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author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-03-31 03:44:26 +0000 |
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committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-03-31 03:44:26 +0000 |
commit | b26eefb68e7942eeb689c81fd20e67e57ad95cd2 (patch) | |
tree | 3eb9eaf50ba68bae2729a0ce1974bea027dfb3ef /target-arm/cpu.h | |
parent | 2a39bc41cb81e1fbd989e0dc648251a1f745c4db (diff) | |
download | qemu-b26eefb68e7942eeb689c81fd20e67e57ad95cd2.zip |
ARM TCG conversion 1/16.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4138 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r-- | target-arm/cpu.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index b284a21699..275733e9c1 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -89,7 +89,7 @@ typedef struct CPUARMState { uint32_t NZF; /* N is bit 31. Z is computed from NZF */ uint32_t QF; /* 0 or 1 */ uint32_t GE; /* cpsr[19:16] */ - int thumb; /* cprs[5]. 0 = arm mode, 1 = thumb mode. */ + uint32_t thumb; /* cpsr[5]. 0 = arm mode, 1 = thumb mode. */ uint32_t condexec_bits; /* IT bits. cpsr[15:10,26:25]. */ /* System control coprocessor (cp15) */ @@ -207,6 +207,7 @@ typedef struct CPUARMState { } CPUARMState; CPUARMState *cpu_arm_init(const char *cpu_model); +void arm_translate_init(void); int cpu_arm_exec(CPUARMState *s); void cpu_arm_close(CPUARMState *s); void do_interrupt(CPUARMState *); |