diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2016-01-21 14:15:06 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2016-01-21 14:15:06 +0000 |
commit | 9e273ef2174d7cd5b14a16d8638812541d3eb6bb (patch) | |
tree | 9a2983fde691ef7966aa236f3ab4ff54b8c0e2d8 /target-arm/cpu.c | |
parent | 6731d864f80938e404dc3e5eb7f6b76b891e3e43 (diff) | |
download | qemu-9e273ef2174d7cd5b14a16d8638812541d3eb6bb.zip |
target-arm: Add QOM property for Secure memory region
Add QOM property to the ARM CPU which boards can use to tell us what
memory region to use for secure accesses. Nonsecure accesses
go via the memory region specified with the base CPU class 'memory'
property.
By default, if no secure region is specified it is the same as the
nonsecure region, and if no nonsecure region is specified we will use
address_space_memory.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target-arm/cpu.c')
-rw-r--r-- | target-arm/cpu.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 3f5f8e8cb5..57f1754cbf 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -543,6 +543,15 @@ static void arm_cpu_post_init(Object *obj) */ qdev_property_add_static(DEVICE(obj), &arm_cpu_has_el3_property, &error_abort); + +#ifndef CONFIG_USER_ONLY + object_property_add_link(obj, "secure-memory", + TYPE_MEMORY_REGION, + (Object **)&cpu->secure_memory, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_UNREF_ON_RELEASE, + &error_abort); +#endif } if (arm_feature(&cpu->env, ARM_FEATURE_MPU)) { @@ -666,6 +675,29 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) init_cpreg_list(cpu); +#ifndef CONFIG_USER_ONLY + if (cpu->has_el3) { + cs->num_ases = 2; + } else { + cs->num_ases = 1; + } + + if (cpu->has_el3) { + AddressSpace *as; + + if (!cpu->secure_memory) { + cpu->secure_memory = cs->memory; + } + as = address_space_init_shareable(cpu->secure_memory, + "cpu-secure-memory"); + cpu_address_space_init(cs, as, ARMASIdx_S); + } + cpu_address_space_init(cs, + address_space_init_shareable(cs->memory, + "cpu-memory"), + ARMASIdx_NS); +#endif + qemu_init_vcpu(cs); cpu_reset(cs); |