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authorWill Auld <will.auld.intel@gmail.com>2012-11-26 21:32:18 -0800
committerMarcelo Tosatti <mtosatti@redhat.com>2012-12-14 18:17:36 -0200
commitf28558d3d37ad3bc4e35e8ac93f7bf81a0d5622c (patch)
treeb9739616a21b467712f6e212559b4ee5a68e3b0d /qstring.c
parente376a788ae130454ad5e797f60cb70d0308babb6 (diff)
downloadqemu-f28558d3d37ad3bc4e35e8ac93f7bf81a0d5622c.zip
target-i386: Enabling IA32_TSC_ADJUST for QEMU KVM guest VMs
CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported Basic design is to emulate the MSR by allowing reads and writes to the hypervisor vcpu specific locations to store the value of the emulated MSRs. In this way the IA32_TSC_ADJUST value will be included in all reads to the TSC MSR whether through rdmsr or rdtsc. As this is a new MSR that the guest may access and modify its value needs to be migrated along with the other MRSs. The changes here are specifically for recognizing when IA32_TSC_ADJUST is enabled in CPUID and code added for migrating its value. Signed-off-by: Will Auld <will.auld@intel.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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