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| author | Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> | 2016-07-26 17:28:37 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-09-07 09:52:14 +1000 |
| commit | 5f29cc829225f777ca4697cb955572feebaf0748 (patch) | |
| tree | 187fa459d1c303ffb7c8452f98bd66a3f7ac6f6b /qemu-timer.c | |
| parent | aeeb044c7bd59ced2b630bf82f644a2137ac9a6f (diff) | |
| download | qemu-5f29cc829225f777ca4697cb955572feebaf0748.zip | |
target-ppc: add maddhd and maddhdu instruction
maddhd: Multiply-Add High Doubleword
maddhdu: Multiply-Add High Doubleword Unsigned
Above two instruction are dual form and differ by 1 bit
(31st bit)
Multiplies two 64-bit registers (RA * RB), adds third register(RC) to
the result(quadword) and returns the higher dword in the target
register(RT).
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'qemu-timer.c')
0 files changed, 0 insertions, 0 deletions