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authorBALATON Zoltan <balaton@eik.bme.hu>2018-03-26 01:54:28 +0200
committerDavid Gibson <david@gibson.dropbear.id.au>2018-04-27 18:05:22 +1000
commit99d45f8fbd6756c2495bcb554dcbf50585f1f7b0 (patch)
treef1f862efeda73aa98059ab4ffa2cf97843cf1c2c /qemu-img-cmds.hx
parenta2f04333a340282c0842e76c055297cb7ba56f0f (diff)
downloadqemu-99d45f8fbd6756c2495bcb554dcbf50585f1f7b0.zip
target/ppc: Fix reserved bit mask of dstst instruction
According to the Vector/SIMD extension documentation bit 6 that is currently masked is valid (listed as transient bit) but bits 7 and 8 should be reserved instead. Fix the mask to match this. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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