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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-10-22 12:06:47 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-10-22 12:06:47 +0100 |
| commit | 31cc9514a50d1dc9fc71aec4e309c8af6fd83f3e (patch) | |
| tree | f0f41fe7b038406b02da8808f68a1e641dd7ab7f /qapi/common.json | |
| parent | 01a2050fa5fb3d290134b67ee82eb3ebbd91d95b (diff) | |
| parent | 340fff722d8a7cf9c0d4f1e1b4fad03a145a9657 (diff) | |
| download | qemu-31cc9514a50d1dc9fc71aec4e309c8af6fd83f3e.zip | |
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141015' into staging
* remotes/lalrae/tags/mips-20141015: (28 commits)
target-mips: Remove unused gen_load_ACX, gen_store_ACX and cpu_ACX
target-mips/dsp_helper.c: Add ifdef guards around various functions
target-mips/translate.c: Add ifdef guard around check_mips64()
target-mips/op_helper.c: Remove unused do_lbu() function
target-mips/dsp_helper.c: Remove unused function get_DSPControl_24()
target-mips: fix broken MIPS16 and microMIPS
target-mips/translate.c: Update OPC_SYNCI
target-mips: define a new generic CPU supporting MIPS64 Release 6 ISA
mips_malta: update malta's pseudo-bootloader - replace JR with JALR
target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructions
target-mips: do not allow Status.FR=0 mode in 64-bit FPU
target-mips: add new Floating Point Comparison instructions
target-mips: add new Floating Point instructions
softfloat: add functions corresponding to IEEE-2008 min/maxNumMag
target-mips: add AUI, LSA and PCREL instruction families
target-mips: add compact and CP1 branches
target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructions
target-mips: Status.UX/SX/KX enable 32-bit address wrapping
target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6
target-mips: redefine Integer Multiply and Divide instructions
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'qapi/common.json')
0 files changed, 0 insertions, 0 deletions