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| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2015-06-15 18:06:10 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-06-15 18:06:10 +0100 |
| commit | 8085ce63c5967d200f1241b6c0a189371993c5df (patch) | |
| tree | bedaaf4ccbc88fdf91e1455c63385a616f2a447d /po | |
| parent | 62b44f059a84d1ac580a653fc4110dfabaef6b83 (diff) | |
| download | qemu-8085ce63c5967d200f1241b6c0a189371993c5df.zip | |
arm: Do not define TLBTR in PMSA systems
If doing a PMSA (MPU) system do not define the VMSA specific TLBTR CP.
The def is done separately from VMSA registers group as it is affected
by both the OMAP/STRONGARM RW errata and the MIDR backgrounding.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: b03fea3840207edf633f5c9189400c3dd6a28d14.1434066412.git.peter.crosthwaite@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'po')
0 files changed, 0 insertions, 0 deletions