diff options
author | Bin Meng <bin.meng@windriver.com> | 2020-09-03 18:40:15 +0800 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2020-09-09 15:54:19 -0700 |
commit | 4921a0ce86cecd03e6918832673db79de62e6fe1 (patch) | |
tree | 5da8decc3b08809b7f5fdaddedb25d5e43fd8166 /meson.build | |
parent | 0fa9e329454aaccc6dbb6a4f52ad0c88a060a3b6 (diff) | |
download | qemu-4921a0ce86cecd03e6918832673db79de62e6fe1.zip |
hw/riscv: Move sifive_gpio model to hw/gpio
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_gpio model to hw/gpio directory.
Note this also removes the trace-events in the hw/riscv directory,
since gpio is the only supported trace target in that directory.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-5-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'meson.build')
-rw-r--r-- | meson.build | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/meson.build b/meson.build index 5421eca66a..bc869c676a 100644 --- a/meson.build +++ b/meson.build @@ -773,7 +773,6 @@ if have_system 'hw/watchdog', 'hw/xen', 'hw/gpio', - 'hw/riscv', 'migration', 'net', 'ui', |