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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2019-02-15 18:00:24 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2019-02-26 09:21:25 +1100
commit34525595fb379796241b0f3a9946bb21c4da1178 (patch)
tree88b7eca851989b02dab8df2213375a5286cf1788 /linux-user/s390x
parent3054b0ca4bdd83e0780bd76805ca17aa733031c8 (diff)
downloadqemu-34525595fb379796241b0f3a9946bb21c4da1178.zip
target/ppc: Add basic support for "new format" HPTE as found on POWER9
POWER9 (arch v3) slightly changes the HPTE format. The B bits move from the first to the second half of the HPTE, and the AVPN/ARPN are slightly shorter. However, under SPAPR, the hypercalls still take the old format (and probably will for the foreseable future). The simplest way to support this is thus to convert the HPTEs from new to old format when reading them if the MMU model is v3 and there is no virtual hypervisor, leaving the rest of the code unchanged. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190215170029.15641-8-clg@kaod.org> [dwg: Moved function to .c since there was no real need for it in the .h] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'linux-user/s390x')
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