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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-09-08 17:38:43 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-09-08 17:38:43 +0100 |
| commit | 8ff41f3995ad2d942ecafb72519c1f09cb811259 (patch) | |
| tree | e45961532999466952bf3b4e4684f0439a111bb4 /include | |
| parent | d8b1ae4237b5f8cf5037a7f341ff43dc02955256 (diff) | |
| download | qemu-8ff41f3995ad2d942ecafb72519c1f09cb811259.zip | |
hw/intc/arm_gic_common: Configure IRQs as NS if doing direct NS kernel boot
If we directly boot a kernel in NonSecure on a system where the GIC
supports the security extensions then we must cause the GIC to
configure its interrupts into group 1 (NonSecure) rather than the
usual group 0, and with their initial priority set to the highest
NonSecure priority rather than the usual highest Secure priority.
Otherwise the guest kernel will be unable to use any interrupts.
Implement this behaviour, controlled by a flag which we set if
appropriate when the ARM bootloader code calls our ARMLinuxBootIf
interface callback.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1441383782-24378-4-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/intc/arm_gic_common.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h index b9dfe05c6e..564a72b2cf 100644 --- a/include/hw/intc/arm_gic_common.h +++ b/include/hw/intc/arm_gic_common.h @@ -109,6 +109,7 @@ typedef struct GICState { uint32_t num_irq; uint32_t revision; bool security_extn; + bool irq_reset_nonsecure; /* configure IRQs as group 1 (NS) on reset? */ int dev_fd; /* kvm device fd if backed by kvm vgic support */ } GICState; |