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authorBin Meng <bin.meng@windriver.com>2020-06-08 07:17:35 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-06-19 08:24:07 -0700
commit4bb216f637d16b6deed499d0be1c34ff03bd625c (patch)
treeb47b108a7bf0ca2cb5ccd6d6d529dd9184956df5 /include
parent2e30ccb425fafa7b7b76d41a7f2e97dd6977fbce (diff)
downloadqemu-4bb216f637d16b6deed499d0be1c34ff03bd625c.zip
hw/riscv: sifive_gpio: Add a new 'ngpio' property
Add a new property to represent the number of GPIO pins supported by the GPIO controller. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1591625864-31494-7-git-send-email-bmeng.cn@gmail.com Message-Id: <1591625864-31494-7-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/riscv/sifive_gpio.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/riscv/sifive_gpio.h b/include/hw/riscv/sifive_gpio.h
index ad915b26d6..cf12fcfd62 100644
--- a/include/hw/riscv/sifive_gpio.h
+++ b/include/hw/riscv/sifive_gpio.h
@@ -68,6 +68,9 @@ typedef struct SIFIVEGPIOState {
uint32_t out_xor;
uint32_t in;
uint32_t in_mask;
+
+ /* config */
+ uint32_t ngpio;
} SIFIVEGPIOState;
#endif /* SIFIVE_GPIO_H */