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authorAndreas Färber <afaerber@suse.de>2013-08-26 05:51:49 +0200
committerAndreas Färber <afaerber@suse.de>2014-03-13 19:20:46 +0100
commit28ecfd7a62fafe8f4f0b35a157005f4d13913043 (patch)
tree55fdec3773eae0d778f100667f467d837f18a124 /include
parentefee734004c42ba185098086e5185d8a85ed02af (diff)
downloadqemu-28ecfd7a62fafe8f4f0b35a157005f4d13913043.zip
cpu: Move icount_decr field from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'include')
-rw-r--r--include/exec/cpu-defs.h20
-rw-r--r--include/exec/gen-icount.h6
-rw-r--r--include/qom/cpu.h19
3 files changed, 23 insertions, 22 deletions
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 8f9871c40e..d036e8e350 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -118,18 +118,6 @@ QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1 << CPU_TLB_ENTRY_BITS));
#endif
-#ifdef HOST_WORDS_BIGENDIAN
-typedef struct icount_decr_u16 {
- uint16_t high;
- uint16_t low;
-} icount_decr_u16;
-#else
-typedef struct icount_decr_u16 {
- uint16_t low;
- uint16_t high;
-} icount_decr_u16;
-#endif
-
typedef struct CPUBreakpoint {
target_ulong pc;
int flags; /* BP_* */
@@ -149,14 +137,6 @@ typedef struct CPUWatchpoint {
CPU_COMMON_TLB \
struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
\
- /* Number of cycles left, with interrupt flag in high bit. \
- This allows a single read-compare-cbranch-write sequence to test \
- for both decrementer underflow and exceptions. */ \
- union { \
- uint32_t u32; \
- icount_decr_u16 u16; \
- } icount_decr; \
- \
/* from this point: preserved by CPU reset */ \
/* ice debug support */ \
QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints; \
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index f0dace3034..da53395de6 100644
--- a/include/exec/gen-icount.h
+++ b/include/exec/gen-icount.h
@@ -26,13 +26,15 @@ static inline void gen_tb_start(void)
icount_label = gen_new_label();
count = tcg_temp_local_new_i32();
- tcg_gen_ld_i32(count, cpu_env, offsetof(CPUArchState, icount_decr.u32));
+ tcg_gen_ld_i32(count, cpu_env,
+ -ENV_OFFSET + offsetof(CPUState, icount_decr.u32));
/* This is a horrid hack to allow fixing up the value later. */
icount_arg = tcg_ctx.gen_opparam_ptr + 1;
tcg_gen_subi_i32(count, count, 0xdeadbeef);
tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, icount_label);
- tcg_gen_st16_i32(count, cpu_env, offsetof(CPUArchState, icount_decr.u16.low));
+ tcg_gen_st16_i32(count, cpu_env,
+ -ENV_OFFSET + offsetof(CPUState, icount_decr.u16.low));
tcg_temp_free_i32(count);
}
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 012a7e6e79..3156b16ad1 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -138,6 +138,18 @@ typedef struct CPUClass {
const char *gdb_core_xml_file;
} CPUClass;
+#ifdef HOST_WORDS_BIGENDIAN
+typedef struct icount_decr_u16 {
+ uint16_t high;
+ uint16_t low;
+} icount_decr_u16;
+#else
+typedef struct icount_decr_u16 {
+ uint16_t low;
+ uint16_t high;
+} icount_decr_u16;
+#endif
+
struct KVMState;
struct kvm_run;
@@ -158,6 +170,9 @@ struct kvm_run;
* CPU and return to its top level loop.
* @singlestep_enabled: Flags for single-stepping.
* @icount_extra: Instructions until next timer event.
+ * @icount_decr: Number of cycles left, with interrupt flag in high bit.
+ * This allows a single read-compare-cbranch-write sequence to test
+ * for both decrementer underflow and exceptions.
* @can_do_io: Nonzero if memory-mapped IO is safe.
* @env_ptr: Pointer to subclass-specific CPUArchState field.
* @current_tb: Currently executing TB.
@@ -223,6 +238,10 @@ struct CPUState {
/* TODO Move common fields from CPUArchState here. */
int cpu_index; /* used by alpha TCG */
uint32_t halted; /* used by alpha, cris, ppc TCG */
+ union {
+ uint32_t u32;
+ icount_decr_u16 u16;
+ } icount_decr;
uint32_t can_do_io;
};