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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-10-18 09:29:43 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-10-18 09:29:44 +0100 |
| commit | e8ddc2eae5ccc41f0815e5c43e70cb04a7e67e2e (patch) | |
| tree | 9c61e0318fe412a4d3f7030b9fdddc2abbb0ad11 /include/hw | |
| parent | 2d02ac10b6644d71c88cc7943e74d7ad6674fff1 (diff) | |
| parent | 46c032f3afcc05a0123914609f1003906ba63fda (diff) | |
| download | qemu-e8ddc2eae5ccc41f0815e5c43e70cb04a7e67e2e.zip | |
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging
x86 queue, 2016-10-17
# gpg: Signature made Mon 17 Oct 2016 18:51:07 BST
# gpg: using RSA key 0x2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/x86-pull-request: (21 commits)
target-i386: Don't use cpu->migratable when filtering features
target-i386: Return runnability information on query-cpu-definitions
target-i386: x86_cpu_load_features() function
target-i386: Unset cannot_destroy_with_object_finalize_yet
target-i386/kvm: cache the return value of kvm_enable_x2apic()
intel_iommu: reject broken EIM
intel_iommu: add OnOffAuto intr_eim as "eim" property
intel_iommu: redo configuraton check in realize
intel_iommu: pass whole remapped addresses to apic
apic: add send_msi() to APICCommonClass
apic: add global apic_get_class()
target-i386: Move warning code outside x86_cpu_filter_features()
qmp: Add runnability information to query-cpu-definitions
target-i386: xsave: Add FP and SSE bits to x86_ext_save_areas
target-i386: Register properties for feature aliases manually
target-i386: Remove underscores from feat_names arrays
target-i386: Make plus_features/minus_features QOM-based
target-i386: Register aliases for feature names with underscores
target-i386: Disable VME by default with TCG
target-i386: List CPU models using subclass list
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/compat.h | 4 | ||||
| -rw-r--r-- | include/hw/i386/apic_internal.h | 6 | ||||
| -rw-r--r-- | include/hw/i386/intel_iommu.h | 2 |
3 files changed, 12 insertions, 0 deletions
diff --git a/include/hw/compat.h b/include/hw/compat.h index ef3fae3e1b..0f06e113be 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -14,6 +14,10 @@ .driver = "ioapic",\ .property = "version",\ .value = "0x11",\ + },{\ + .driver = "intel-iommu",\ + .property = "x-buggy-eim",\ + .value = "true",\ }, #define HW_COMPAT_2_6 \ diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h index 06c4e9f6f9..cdd11fb093 100644 --- a/include/hw/i386/apic_internal.h +++ b/include/hw/i386/apic_internal.h @@ -146,6 +146,10 @@ typedef struct APICCommonClass void (*pre_save)(APICCommonState *s); void (*post_load)(APICCommonState *s); void (*reset)(APICCommonState *s); + /* send_msi emulates an APIC bus and its proper place would be in a new + * device, but it's convenient to have it here for now. + */ + void (*send_msi)(MSIMessage *msi); } APICCommonClass; struct APICCommonState { @@ -222,4 +226,6 @@ static inline int apic_get_bit(uint32_t *tab, int index) return !!(tab[i] & mask); } +APICCommonClass *apic_get_class(void); + #endif /* QEMU_APIC_INTERNAL_H */ diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index a42dbd745a..1989c1eec1 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -289,6 +289,8 @@ struct IntelIOMMUState { dma_addr_t intr_root; /* Interrupt remapping table pointer */ uint32_t intr_size; /* Number of IR table entries */ bool intr_eime; /* Extended interrupt mode enabled */ + OnOffAuto intr_eim; /* Toggle for EIM cabability */ + bool buggy_eim; /* Force buggy EIM unless eim=off */ }; /* Find the VTD Address space associated with the given bus pointer, |