diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-10-12 11:58:00 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-10-17 13:59:40 +0200 |
| commit | e8373c56531cec8eb48743f261e8b216bcda589a (patch) | |
| tree | 9d11441b884e234fd5d378799eb570407421881c /include/hw | |
| parent | 79b99fe3f09979b6ba0a8d9f4603dc43e7e066c4 (diff) | |
| download | qemu-e8373c56531cec8eb48743f261e8b216bcda589a.zip | |
hw/mips/cps: Expose input clock and connect it to CPU cores
Expose a qdev input clock named 'clk-in', and connect it to each
core to forward-propagate the clock.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201012095804.3335117-18-f4bug@amsat.org>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/mips/cps.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h index 9e35a88136..859a8d4a67 100644 --- a/include/hw/mips/cps.h +++ b/include/hw/mips/cps.h @@ -21,6 +21,7 @@ #define MIPS_CPS_H #include "hw/sysbus.h" +#include "hw/clock.h" #include "hw/misc/mips_cmgcr.h" #include "hw/intc/mips_gic.h" #include "hw/misc/mips_cpc.h" @@ -43,6 +44,7 @@ struct MIPSCPSState { MIPSGICState gic; MIPSCPCState cpc; MIPSITUState itu; + Clock *clock; }; qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number); |