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authorCédric Le Goater <clg@kaod.org>2016-09-22 18:13:06 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-09-22 18:13:06 +0100
commitc6c7cfb01a00be0553f6694bbe71d45fc5e068c8 (patch)
tree3883b3fe92e2773ad78ba74a0910b33c08bb1944 /include/hw
parentb2fd45458d294e0a8a7c559881788d8642958bb7 (diff)
downloadqemu-c6c7cfb01a00be0553f6694bbe71d45fc5e068c8.zip
aspeed: add a ram_size property to the memory controller
Configure the size of the RAM of the SOC using a property to propagate the value down to the memory controller from the board level. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1473438177-26079-14-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
-rw-r--r--include/hw/misc/aspeed_sdmc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h
index df7dce0edd..551c8afdf4 100644
--- a/include/hw/misc/aspeed_sdmc.h
+++ b/include/hw/misc/aspeed_sdmc.h
@@ -26,6 +26,7 @@ typedef struct AspeedSDMCState {
uint32_t regs[ASPEED_SDMC_NR_REGS];
uint32_t silicon_rev;
uint32_t ram_bits;
+ uint64_t ram_size;
} AspeedSDMCState;