diff options
| author | Alistair Francis <alistair.francis@wdc.com> | 2020-12-16 10:23:08 -0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-12-17 21:56:44 -0800 |
| commit | 3ed2b8ac2dacc22c088ec5793ecde31db2fa0414 (patch) | |
| tree | 734bb793e6c561360a30de8ecca155ebf2db112a /include/hw/riscv | |
| parent | 094b072c6819f251e4cba608585f0f5f59259797 (diff) | |
| download | qemu-3ed2b8ac2dacc22c088ec5793ecde31db2fa0414.zip | |
hw/riscv: Use the CPU to determine if 32-bit
Instead of using string compares to determine if a RISC-V machine is
using 32-bit or 64-bit CPUs we can use the initalised CPUs. This avoids
us having to maintain a list of CPU names to compare against.
This commit also fixes the name of the function to match the
riscv_cpu_is_32bit() function.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 8ab7614e5df93ab5267788b73dcd75f9f5615e82.1608142916.git.alistair.francis@wdc.com
Diffstat (limited to 'include/hw/riscv')
| -rw-r--r-- | include/hw/riscv/boot.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index b6d37a91d6..20ff5fe5e5 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -22,10 +22,11 @@ #include "exec/cpu-defs.h" #include "hw/loader.h" +#include "hw/riscv/riscv_hart.h" -bool riscv_is_32_bit(MachineState *machine); +bool riscv_is_32bit(RISCVHartArrayState harts); -target_ulong riscv_calc_kernel_start_addr(MachineState *machine, +target_ulong riscv_calc_kernel_start_addr(RISCVHartArrayState harts, target_ulong firmware_end_addr); target_ulong riscv_find_and_load_firmware(MachineState *machine, const char *default_machine_firmware, @@ -41,7 +42,8 @@ target_ulong riscv_load_kernel(const char *kernel_filename, hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, uint64_t kernel_entry, hwaddr *start); uint32_t riscv_load_fdt(hwaddr dram_start, uint64_t dram_size, void *fdt); -void riscv_setup_rom_reset_vec(MachineState *machine, hwaddr saddr, +void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState harts, + hwaddr saddr, hwaddr rom_base, hwaddr rom_size, uint64_t kernel_entry, uint32_t fdt_load_addr, void *fdt); |