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authorPeter Maydell <peter.maydell@linaro.org>2018-03-02 10:45:39 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-03-02 11:03:45 +0000
commit9a52d9992f179416f02cef457c947a28999d879d (patch)
tree3a28c6d748983857c706a8aac1d38ee0562b1f09 /include/hw/misc/mps2-fpgaio.h
parent5edb1b3fa93217cf7adc50725a69ab0cefcea973 (diff)
downloadqemu-9a52d9992f179416f02cef457c947a28999d879d.zip
hw/misc/mps2-fpgaio: FPGA control block for MPS2 AN505
The MPS2 AN505 FPGA image includes a "FPGA control block" which is a small set of registers handling LEDs, buttons and some counters. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180220180325.29818-14-peter.maydell@linaro.org
Diffstat (limited to 'include/hw/misc/mps2-fpgaio.h')
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diff --git a/include/hw/misc/mps2-fpgaio.h b/include/hw/misc/mps2-fpgaio.h
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+/*
+ * ARM MPS2 FPGAIO emulation
+ *
+ * Copyright (c) 2018 Linaro Limited
+ * Written by Peter Maydell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 or
+ * (at your option) any later version.
+ */
+
+/* This is a model of the FPGAIO register block in the AN505
+ * FPGA image for the MPS2 dev board; it is documented in the
+ * application note:
+ * http://infocenter.arm.com/help/topic/com.arm.doc.dai0505b/index.html
+ *
+ * QEMU interface:
+ * + sysbus MMIO region 0: the register bank
+ */
+
+#ifndef MPS2_FPGAIO_H
+#define MPS2_FPGAIO_H
+
+#include "hw/sysbus.h"
+
+#define TYPE_MPS2_FPGAIO "mps2-fpgaio"
+#define MPS2_FPGAIO(obj) OBJECT_CHECK(MPS2FPGAIO, (obj), TYPE_MPS2_FPGAIO)
+
+typedef struct {
+ /*< private >*/
+ SysBusDevice parent_obj;
+
+ /*< public >*/
+ MemoryRegion iomem;
+
+ uint32_t led0;
+ uint32_t prescale;
+ uint32_t misc;
+
+ uint32_t prescale_clk;
+} MPS2FPGAIO;
+
+#endif