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authorLeon Alrae <leon.alrae@imgtec.com>2016-03-15 09:59:31 +0000
committerLeon Alrae <leon.alrae@imgtec.com>2016-03-30 09:13:59 +0100
commit2edd5261fffcc8494936d353ffffe996d191da3b (patch)
tree7ebf59fda5c336be17eb6b056b99235d57520c94 /include/hw/mips
parent1f93a6e4f3f4da3c2ce4be1d300dcfe3e6dd0e77 (diff)
downloadqemu-2edd5261fffcc8494936d353ffffe996d191da3b.zip
hw/mips/cps: create CPC block inside CPS
Create Cluster Power Controller and add a link to the CPC MemoryRegion in GCR. Guest can enable / map CPC to any physical address by writing to the memory-mapped GCR_CPC_BASE register. Set vp-start-reset property to 1 to allow only first VP to run from reset. Others are brought up by the guest via CPC memory-mapped registers. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'include/hw/mips')
-rw-r--r--include/hw/mips/cps.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h
index 1b200d6ac1..88be7653d7 100644
--- a/include/hw/mips/cps.h
+++ b/include/hw/mips/cps.h
@@ -22,6 +22,7 @@
#include "hw/sysbus.h"
#include "hw/misc/mips_cmgcr.h"
+#include "hw/misc/mips_cpc.h"
#define TYPE_MIPS_CPS "mips-cps"
#define MIPS_CPS(obj) OBJECT_CHECK(MIPSCPSState, (obj), TYPE_MIPS_CPS)
@@ -35,6 +36,7 @@ typedef struct MIPSCPSState {
MemoryRegion container;
MIPSGCRState gcr;
+ MIPSCPCState cpc;
} MIPSCPSState;
qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number);