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authorJoel Stanley <joel@jms.id.au>2019-09-25 16:32:46 +0200
committerPeter Maydell <peter.maydell@linaro.org>2019-10-15 18:09:05 +0100
commitd300db02774b2225cd8a527ee6212e093e94fdce (patch)
treea70fd2ab9de3b8cd5dfb307cfd53765ccff92acc /include/hw/arm
parent519370bc63ea885ee8e69eb5dc3c64799206e5b2 (diff)
downloadqemu-d300db02774b2225cd8a527ee6212e093e94fdce.zip
aspeed: Parameterise number of MACs
To support the ast2600's four MACs allow SoCs to specify the number they have, and create that many. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20190925143248.10000-22-clg@kaod.org [clg: - included a check on sc->macs_num when realizing the macs - included interrupt definitions for the AST2600 ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm')
-rw-r--r--include/hw/arm/aspeed_soc.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 67c59956f8..088a5d1081 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -30,7 +30,7 @@
#define ASPEED_SPIS_NUM 2
#define ASPEED_WDTS_NUM 4
#define ASPEED_CPUS_NUM 2
-#define ASPEED_MACS_NUM 2
+#define ASPEED_MACS_NUM 4
typedef struct AspeedSoCState {
/*< private >*/
@@ -69,6 +69,7 @@ typedef struct AspeedSoCClass {
uint64_t sram_size;
int spis_num;
int wdts_num;
+ int macs_num;
const int *irqmap;
const hwaddr *memmap;
uint32_t num_cpus;
@@ -114,6 +115,8 @@ enum {
ASPEED_I2C,
ASPEED_ETH1,
ASPEED_ETH2,
+ ASPEED_ETH3,
+ ASPEED_ETH4,
ASPEED_SDRAM,
ASPEED_XDMA,
};