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authorPeter Maydell <peter.maydell@linaro.org>2019-10-08 18:17:36 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-10-15 18:09:03 +0100
commitcc2722ec83ad944505fe9371fc4a94efdf4fe90f (patch)
tree4589dc1ed240cd882b1568ad18f8ab645ed50eed /hw
parent82c7f5faefeefec62e90f2764bc9bda4717007bb (diff)
downloadqemu-cc2722ec83ad944505fe9371fc4a94efdf4fe90f.zip
hw/timer/imx_epit.c: Switch to transaction-based ptimer API
Switch the imx_epit.c code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191008171740.9679-18-peter.maydell@linaro.org
Diffstat (limited to 'hw')
-rw-r--r--hw/timer/imx_epit.c32
1 files changed, 27 insertions, 5 deletions
diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c
index 39810ac8b0..baf6338e1a 100644
--- a/hw/timer/imx_epit.c
+++ b/hw/timer/imx_epit.c
@@ -17,7 +17,6 @@
#include "migration/vmstate.h"
#include "hw/irq.h"
#include "hw/misc/imx_ccm.h"
-#include "qemu/main-loop.h"
#include "qemu/module.h"
#include "qemu/log.h"
@@ -74,6 +73,10 @@ static void imx_epit_update_int(IMXEPITState *s)
}
}
+/*
+ * Must be called from within a ptimer_transaction_begin/commit block
+ * for both s->timer_cmp and s->timer_reload.
+ */
static void imx_epit_set_freq(IMXEPITState *s)
{
uint32_t clksrc;
@@ -105,6 +108,8 @@ static void imx_epit_reset(DeviceState *dev)
s->lr = EPIT_TIMER_MAX;
s->cmp = 0;
s->cnt = 0;
+ ptimer_transaction_begin(s->timer_cmp);
+ ptimer_transaction_begin(s->timer_reload);
/* stop both timers */
ptimer_stop(s->timer_cmp);
ptimer_stop(s->timer_reload);
@@ -117,6 +122,8 @@ static void imx_epit_reset(DeviceState *dev)
/* if the timer is still enabled, restart it */
ptimer_run(s->timer_reload, 0);
}
+ ptimer_transaction_commit(s->timer_cmp);
+ ptimer_transaction_commit(s->timer_reload);
}
static uint32_t imx_epit_update_count(IMXEPITState *s)
@@ -164,6 +171,7 @@ static uint64_t imx_epit_read(void *opaque, hwaddr offset, unsigned size)
return reg_value;
}
+/* Must be called from ptimer_transaction_begin/commit block for s->timer_cmp */
static void imx_epit_reload_compare_timer(IMXEPITState *s)
{
if ((s->cr & (CR_EN | CR_OCIEN)) == (CR_EN | CR_OCIEN)) {
@@ -191,6 +199,8 @@ static void imx_epit_write(void *opaque, hwaddr offset, uint64_t value,
switch (offset >> 2) {
case 0: /* CR */
+ ptimer_transaction_begin(s->timer_cmp);
+ ptimer_transaction_begin(s->timer_reload);
oldcr = s->cr;
s->cr = value & 0x03ffffff;
@@ -231,6 +241,9 @@ static void imx_epit_write(void *opaque, hwaddr offset, uint64_t value,
} else {
ptimer_stop(s->timer_cmp);
}
+
+ ptimer_transaction_commit(s->timer_cmp);
+ ptimer_transaction_commit(s->timer_reload);
break;
case 1: /* SR - ACK*/
@@ -244,6 +257,8 @@ static void imx_epit_write(void *opaque, hwaddr offset, uint64_t value,
case 2: /* LR - set ticks */
s->lr = value;
+ ptimer_transaction_begin(s->timer_cmp);
+ ptimer_transaction_begin(s->timer_reload);
if (s->cr & CR_RLD) {
/* Also set the limit if the LRD bit is set */
/* If IOVW bit is set then set the timer value */
@@ -255,12 +270,16 @@ static void imx_epit_write(void *opaque, hwaddr offset, uint64_t value,
}
imx_epit_reload_compare_timer(s);
+ ptimer_transaction_commit(s->timer_cmp);
+ ptimer_transaction_commit(s->timer_reload);
break;
case 3: /* CMP */
s->cmp = value;
+ ptimer_transaction_begin(s->timer_cmp);
imx_epit_reload_compare_timer(s);
+ ptimer_transaction_commit(s->timer_cmp);
break;
@@ -281,6 +300,11 @@ static void imx_epit_cmp(void *opaque)
imx_epit_update_int(s);
}
+static void imx_epit_reload(void *opaque)
+{
+ /* No action required on rollover of timer_reload */
+}
+
static const MemoryRegionOps imx_epit_ops = {
.read = imx_epit_read,
.write = imx_epit_write,
@@ -308,7 +332,6 @@ static void imx_epit_realize(DeviceState *dev, Error **errp)
{
IMXEPITState *s = IMX_EPIT(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
- QEMUBH *bh;
DPRINTF("\n");
@@ -317,10 +340,9 @@ static void imx_epit_realize(DeviceState *dev, Error **errp)
0x00001000);
sysbus_init_mmio(sbd, &s->iomem);
- s->timer_reload = ptimer_init_with_bh(NULL, PTIMER_POLICY_DEFAULT);
+ s->timer_reload = ptimer_init(imx_epit_reload, s, PTIMER_POLICY_DEFAULT);
- bh = qemu_bh_new(imx_epit_cmp, s);
- s->timer_cmp = ptimer_init_with_bh(bh, PTIMER_POLICY_DEFAULT);
+ s->timer_cmp = ptimer_init(imx_epit_cmp, s, PTIMER_POLICY_DEFAULT);
}
static void imx_epit_class_init(ObjectClass *klass, void *data)