diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2014-02-01 23:06:11 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2014-02-01 23:06:26 +0000 |
commit | b4a8c9ae9758efb6873097f415e9972127ccf418 (patch) | |
tree | c1d3111448f3847e7f8a5cddfa7bc3ea47d353ef /hw | |
parent | 850bbe1b94445cb84a2f648bc2e8c35ef6188eb4 (diff) | |
parent | 5b0adce156216fb24dcc5f1683e8b686f3793fff (diff) | |
download | qemu-b4a8c9ae9758efb6873097f415e9972127ccf418.zip |
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20140131' into staging
target-arm queue:
* implementation of first part of the A64 Neon instruction set
* v8 AArch32 rounding and 16<->64 fp conversion instructions
* fix MIDR value on Zynq boards
* some minor bugfixes/code cleanups
# gpg: Signature made Fri 31 Jan 2014 15:06:34 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
* pmaydell/tags/pull-target-arm-20140131: (34 commits)
arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes
arm_gic: Introduce define for GIC_NR_SGIS
target-arm: A64: Add SIMD shift by immediate
target-arm: A64: Add simple SIMD 3-same floating point ops
target-arm: A64: Add integer ops from SIMD 3-same group
target-arm: A64: Add logic ops from SIMD 3 same group
target-arm: A64: Add top level decode for SIMD 3-same group
target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops
target-arm: A64: Add SIMD three-different ABDL instructions
target-arm: A64: Add SIMD three-different multiply accumulate insns
target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTM
target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTM
target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ
target-arm: Add set_neon_rmode helper
target-arm: Add support for AArch32 SIMD VRINTX
target-arm: Add support for AArch32 FP VRINTX
target-arm: Add support for AArch32 FP VRINTZ
target-arm: Add support for AArch32 FP VRINTR
target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTM
target-arm: Move arm_rmode_to_sf to a shared location.
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/arm/boot.c | 9 | ||||
-rw-r--r-- | hw/arm/xilinx_zynq.c | 7 | ||||
-rw-r--r-- | hw/display/blizzard_template.h | 40 | ||||
-rw-r--r-- | hw/display/pl110_template.h | 12 | ||||
-rw-r--r-- | hw/display/pxa2xx_template.h | 22 | ||||
-rw-r--r-- | hw/display/tc6393xb_template.h | 14 | ||||
-rw-r--r-- | hw/intc/arm_gic.c | 21 |
7 files changed, 88 insertions, 37 deletions
diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 1c1b0e5258..4036262f50 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -173,6 +173,11 @@ static void default_reset_secondary(ARMCPU *cpu, env->regs[15] = info->smp_loader_start; } +static inline bool have_dtb(const struct arm_boot_info *info) +{ + return info->dtb_filename || info->get_dtb; +} + #define WRITE_WORD(p, value) do { \ stl_phys_notdirty(p, value); \ p += 4; \ @@ -421,7 +426,7 @@ static void do_cpu_reset(void *opaque) env->regs[15] = info->loader_start; } - if (!info->dtb_filename) { + if (!have_dtb(info)) { if (old_param) { set_kernel_args_old(info); } else { @@ -542,7 +547,7 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info) /* for device tree boot, we pass the DTB directly in r2. Otherwise * we point to the kernel args. */ - if (info->dtb_filename || info->get_dtb) { + if (have_dtb(info)) { /* Place the DTB after the initrd in memory. Note that some * kernels will trash anything in the 4K page the initrd * ends in, so make sure the DTB isn't caught up in that. diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 98e0958a77..9ee21e726a 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -37,6 +37,7 @@ #define IRQ_OFFSET 32 /* pic interrupts start from index 32 */ #define MPCORE_PERIPHBASE 0xF8F00000 +#define ZYNQ_BOARD_MIDR 0x413FC090 static const int dma_irqs[8] = { 46, 47, 48, 49, 72, 73, 74, 75 @@ -125,6 +126,12 @@ static void zynq_init(QEMUMachineInitArgs *args) cpu = ARM_CPU(object_new(object_class_get_name(cpu_oc))); + object_property_set_int(OBJECT(cpu), ZYNQ_BOARD_MIDR, "midr", &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + object_property_set_int(OBJECT(cpu), MPCORE_PERIPHBASE, "reset-cbar", &err); if (err) { error_report("%s", error_get_pretty(err)); diff --git a/hw/display/blizzard_template.h b/hw/display/blizzard_template.h index a8a8899478..b7ef27c808 100644 --- a/hw/display/blizzard_template.h +++ b/hw/display/blizzard_template.h @@ -18,25 +18,35 @@ * with this program; if not, see <http://www.gnu.org/licenses/>. */ -#define SKIP_PIXEL(to) to += deststep +#define SKIP_PIXEL(to) (to += deststep) #if DEPTH == 8 -# define PIXEL_TYPE uint8_t -# define COPY_PIXEL(to, from) *to = from; SKIP_PIXEL(to) -# define COPY_PIXEL1(to, from) *to ++ = from +# define PIXEL_TYPE uint8_t +# define COPY_PIXEL(to, from) do { *to = from; SKIP_PIXEL(to); } while (0) +# define COPY_PIXEL1(to, from) (*to++ = from) #elif DEPTH == 15 || DEPTH == 16 -# define PIXEL_TYPE uint16_t -# define COPY_PIXEL(to, from) *to = from; SKIP_PIXEL(to) -# define COPY_PIXEL1(to, from) *to ++ = from +# define PIXEL_TYPE uint16_t +# define COPY_PIXEL(to, from) do { *to = from; SKIP_PIXEL(to); } while (0) +# define COPY_PIXEL1(to, from) (*to++ = from) #elif DEPTH == 24 -# define PIXEL_TYPE uint8_t -# define COPY_PIXEL(to, from) \ - to[0] = from; to[1] = (from) >> 8; to[2] = (from) >> 16; SKIP_PIXEL(to) -# define COPY_PIXEL1(to, from) \ - *to ++ = from; *to ++ = (from) >> 8; *to ++ = (from) >> 16 +# define PIXEL_TYPE uint8_t +# define COPY_PIXEL(to, from) \ + do { \ + to[0] = from; \ + to[1] = (from) >> 8; \ + to[2] = (from) >> 16; \ + SKIP_PIXEL(to); \ + } while (0) + +# define COPY_PIXEL1(to, from) \ + do { \ + *to++ = from; \ + *to++ = (from) >> 8; \ + *to++ = (from) >> 16; \ + } while (0) #elif DEPTH == 32 -# define PIXEL_TYPE uint32_t -# define COPY_PIXEL(to, from) *to = from; SKIP_PIXEL(to) -# define COPY_PIXEL1(to, from) *to ++ = from +# define PIXEL_TYPE uint32_t +# define COPY_PIXEL(to, from) do { *to = from; SKIP_PIXEL(to); } while (0) +# define COPY_PIXEL1(to, from) (*to++ = from) #else # error unknown bit depth #endif diff --git a/hw/display/pl110_template.h b/hw/display/pl110_template.h index e738e4a241..36ba791c6f 100644 --- a/hw/display/pl110_template.h +++ b/hw/display/pl110_template.h @@ -14,12 +14,16 @@ #if BITS == 8 #define COPY_PIXEL(to, from) *(to++) = from #elif BITS == 15 || BITS == 16 -#define COPY_PIXEL(to, from) *(uint16_t *)to = from; to += 2; +#define COPY_PIXEL(to, from) do { *(uint16_t *)to = from; to += 2; } while (0) #elif BITS == 24 -#define COPY_PIXEL(to, from) \ - *(to++) = from; *(to++) = (from) >> 8; *(to++) = (from) >> 16 +#define COPY_PIXEL(to, from) \ + do { \ + *(to++) = from; \ + *(to++) = (from) >> 8; \ + *(to++) = (from) >> 16; \ + } while (0) #elif BITS == 32 -#define COPY_PIXEL(to, from) *(uint32_t *)to = from; to += 4; +#define COPY_PIXEL(to, from) do { *(uint32_t *)to = from; to += 4; } while (0) #else #error unknown bit depth #endif diff --git a/hw/display/pxa2xx_template.h b/hw/display/pxa2xx_template.h index 1cbe36cb80..c64eebc4b6 100644 --- a/hw/display/pxa2xx_template.h +++ b/hw/display/pxa2xx_template.h @@ -11,14 +11,26 @@ # define SKIP_PIXEL(to) to += deststep #if BITS == 8 -# define COPY_PIXEL(to, from) *to = from; SKIP_PIXEL(to) +# define COPY_PIXEL(to, from) do { *to = from; SKIP_PIXEL(to); } while (0) #elif BITS == 15 || BITS == 16 -# define COPY_PIXEL(to, from) *(uint16_t *) to = from; SKIP_PIXEL(to) +# define COPY_PIXEL(to, from) \ + do { \ + *(uint16_t *) to = from; \ + SKIP_PIXEL(to); \ + } while (0) #elif BITS == 24 -# define COPY_PIXEL(to, from) \ - *(uint16_t *) to = from; *(to + 2) = (from) >> 16; SKIP_PIXEL(to) +# define COPY_PIXEL(to, from) \ + do { \ + *(uint16_t *) to = from; \ + *(to + 2) = (from) >> 16; \ + SKIP_PIXEL(to); \ + } while (0) #elif BITS == 32 -# define COPY_PIXEL(to, from) *(uint32_t *) to = from; SKIP_PIXEL(to) +# define COPY_PIXEL(to, from) \ + do { \ + *(uint32_t *) to = from; \ + SKIP_PIXEL(to); \ + } while (0) #else # error unknown bit depth #endif diff --git a/hw/display/tc6393xb_template.h b/hw/display/tc6393xb_template.h index 154aafd400..78629c07f9 100644 --- a/hw/display/tc6393xb_template.h +++ b/hw/display/tc6393xb_template.h @@ -22,14 +22,18 @@ */ #if BITS == 8 -# define SET_PIXEL(addr, color) *(uint8_t*)addr = color; +# define SET_PIXEL(addr, color) (*(uint8_t *)addr = color) #elif BITS == 15 || BITS == 16 -# define SET_PIXEL(addr, color) *(uint16_t*)addr = color; +# define SET_PIXEL(addr, color) (*(uint16_t *)addr = color) #elif BITS == 24 -# define SET_PIXEL(addr, color) \ - addr[0] = color; addr[1] = (color) >> 8; addr[2] = (color) >> 16; +# define SET_PIXEL(addr, color) \ + do { \ + addr[0] = color; \ + addr[1] = (color) >> 8; \ + addr[2] = (color) >> 16; \ + } while (0) #elif BITS == 32 -# define SET_PIXEL(addr, color) *(uint32_t*)addr = color; +# define SET_PIXEL(addr, color) (*(uint32_t *)addr = color) #else # error unknown bit depth #endif diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 9409684ce8..1c4a1143af 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -380,8 +380,10 @@ static void gic_dist_writeb(void *opaque, hwaddr offset, irq = (offset - 0x100) * 8 + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; - if (irq < 16) - value = 0xff; + if (irq < GIC_NR_SGIS) { + value = 0xff; + } + for (i = 0; i < 8; i++) { if (value & (1 << i)) { int mask = @@ -406,8 +408,10 @@ static void gic_dist_writeb(void *opaque, hwaddr offset, irq = (offset - 0x180) * 8 + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; - if (irq < 16) - value = 0; + if (irq < GIC_NR_SGIS) { + value = 0; + } + for (i = 0; i < 8; i++) { if (value & (1 << i)) { int cm = (irq < GIC_INTERNAL) ? (1 << cpu) : ALL_CPU_MASK; @@ -423,8 +427,9 @@ static void gic_dist_writeb(void *opaque, hwaddr offset, irq = (offset - 0x200) * 8 + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; - if (irq < 16) - irq = 0; + if (irq < GIC_NR_SGIS) { + value = 0; + } for (i = 0; i < 8; i++) { if (value & (1 << i)) { @@ -436,6 +441,10 @@ static void gic_dist_writeb(void *opaque, hwaddr offset, irq = (offset - 0x280) * 8 + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; + if (irq < GIC_NR_SGIS) { + value = 0; + } + for (i = 0; i < 8; i++) { /* ??? This currently clears the pending bit for all CPUs, even for per-CPU interrupts. It's unclear whether this is the |