diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2014-06-29 18:38:39 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-06-29 18:38:39 +0100 |
| commit | 92335a0d4021a3b44ccc88c9fc6c0fd2113f1882 (patch) | |
| tree | 09959745139e7394dc3a607d19878695993e9b1d /hw | |
| parent | 6e411af9351c1b82c2a749653eb4b8d35bf8c04a (diff) | |
| download | qemu-92335a0d4021a3b44ccc88c9fc6c0fd2113f1882.zip | |
hw/arm/strongarm: Fix handling of GPSR/GPCR reads
The StrongARM GPIO GPSR and GPCR registers are write-only, with reads being
undefined behaviour. Instead of having GPCR return 31337 and GPSR return
the value last written, make both log the guest error and return 0.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/arm/strongarm.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 0da9015333..cc2d7f20e9 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -480,7 +480,6 @@ struct StrongARMGPIOInfo { uint32_t rising; uint32_t falling; uint32_t status; - uint32_t gpsr; uint32_t gafr; uint32_t prev_level; @@ -544,14 +543,14 @@ static uint64_t strongarm_gpio_read(void *opaque, hwaddr offset, return s->dir; case GPSR: /* GPIO Pin-Output Set registers */ - DPRINTF("%s: Read from a write-only register 0x" TARGET_FMT_plx "\n", - __func__, offset); - return s->gpsr; /* Return last written value. */ + qemu_log_mask(LOG_GUEST_ERROR, + "strongarm GPIO: read from write only register GPSR\n"); + return 0; case GPCR: /* GPIO Pin-Output Clear registers */ - DPRINTF("%s: Read from a write-only register 0x" TARGET_FMT_plx "\n", - __func__, offset); - return 31337; /* Specified as unpredictable in the docs. */ + qemu_log_mask(LOG_GUEST_ERROR, + "strongarm GPIO: read from write only register GPCR\n"); + return 0; case GRER: /* GPIO Rising-Edge Detect Enable registers */ return s->rising; @@ -590,7 +589,6 @@ static void strongarm_gpio_write(void *opaque, hwaddr offset, case GPSR: /* GPIO Pin-Output Set registers */ s->olevel |= value; strongarm_gpio_handler_update(s); - s->gpsr = value; break; case GPCR: /* GPIO Pin-Output Clear registers */ |