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authorPeter Maydell <peter.maydell@linaro.org>2019-01-14 17:35:00 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-01-14 17:35:00 +0000
commit89bd861c2b470e3fb45596945509079c72af3ac2 (patch)
tree92ee46e443d648a723e17935fb0e9899ae0d2231 /hw
parentc9d18c1c150c84e7a976df989ad04ddf01083f46 (diff)
parentabd5fc4c862d033a989552914149f01c9476bb16 (diff)
downloadqemu-89bd861c2b470e3fb45596945509079c72af3ac2.zip
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging
x86 queue, 2019-01-14 * Reenable RDTSCP support on Opteron_G[345] CPU models CPU models (Borislav Petkov) * host-phys-bits-limit option for better control of 5-level EPT (Eduardo Habkost) * Disable MPX support on named CPU models (Paolo Bonzini) * expose HV_CPUID_ENLIGHTMENT_INFO.EAX and HV_CPUID_NESTED_FEATURES.EAX as feature words (Vitaly Kuznetsov) # gpg: Signature made Mon 14 Jan 2019 14:33:55 GMT # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: i386/kvm: add a comment explaining why .feat_names are commented out for Hyper-V feature bits x86: host-phys-bits-limit option target/i386: Disable MPX support on named CPU models target-i386: Reenable RDTSCP support on Opteron_G[345] CPU models CPU models i386/kvm: expose HV_CPUID_ENLIGHTMENT_INFO.EAX and HV_CPUID_NESTED_FEATURES.EAX as feature words Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/i386/pc.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index fc65049e1d..73d688f842 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -112,6 +112,16 @@ struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
GlobalProperty pc_compat_3_1[] = {
{ "intel-iommu", "dma-drain", "off" },
+ { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "off" },
+ { "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "off" },
+ { "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "off" },
+ { "Skylake-Client" "-" TYPE_X86_CPU, "mpx", "on" },
+ { "Skylake-Client-IBRS" "-" TYPE_X86_CPU, "mpx", "on" },
+ { "Skylake-Server" "-" TYPE_X86_CPU, "mpx", "on" },
+ { "Skylake-Server-IBRS" "-" TYPE_X86_CPU, "mpx", "on" },
+ { "Cascadelake-Server" "-" TYPE_X86_CPU, "mpx", "on" },
+ { "Icelake-Client" "-" TYPE_X86_CPU, "mpx", "on" },
+ { "Icelake-Server" "-" TYPE_X86_CPU, "mpx", "on" },
};
const size_t pc_compat_3_1_len = G_N_ELEMENTS(pc_compat_3_1);