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author | Richard Henderson <richard.henderson@linaro.org> | 2021-03-23 12:43:32 -0600 |
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committer | David Gibson <david@gibson.dropbear.id.au> | 2021-05-04 11:41:24 +1000 |
commit | 2df4fe7abeed5be7c4350c12cfe33242261b28ef (patch) | |
tree | ade48f52cf11c777a8187010e380d0f8ec4be740 /hw | |
parent | edece45d4ac2a12a7183d8fb1ddd7f7984910ab8 (diff) | |
download | qemu-2df4fe7abeed5be7c4350c12cfe33242261b28ef.zip |
target/ppc: Disconnect hflags from MSR
Copying flags directly from msr has drawbacks: (1) msr bits
mean different things per cpu, (2) msr has 64 bits on 64 cpus
while tb->flags has only 32 bits.
Create a enum to define these bits. Document the origin of each bit
and validate those bits that must match MSR. This fixes the
truncation of env->hflags to tb->flags, because we no longer
have hflags bits set above bit 31.
Most of the code in ppc_tr_init_disas_context is moved over to
hreg_compute_hflags. Some of it is simple extractions from msr,
some requires examining other cpu flags. Anything that is moved
becomes a simple extract from hflags in ppc_tr_init_disas_context.
Several existing bugs are left in ppc_tr_init_disas_context, where
additional changes are required -- to be addressed in future patches.
Remove a broken #if 0 block.
Reported-by: Ivan Warren <ivan@vmfacility.fr>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210323184340.619757-3-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw')
0 files changed, 0 insertions, 0 deletions