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authorPeter Maydell <peter.maydell@linaro.org>2016-04-04 17:33:51 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-04-04 17:33:51 +0100
commit0dc1982312a7f8b5379b039d9f799bac343cc8f3 (patch)
treed62983189f4f80ed4ff2ee4a219ed24d91072f55 /hw
parentc40e13e106243a6798b7b02b4d7de5ff6c9be128 (diff)
downloadqemu-0dc1982312a7f8b5379b039d9f799bac343cc8f3.zip
hw/arm/bcm2836: Wire up CPU timer interrupts correctly
Wire up the CPU timer interrupts in the right order, with the nonsecure physical timer on cntpnsirq, the hyp timer on cnthpirq, and the secure physical timer on cntpsirq. (We did get the virt timer right, at least.) Reported-by: Antonio Huete Jiménez <tuxillo@quantumachine.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1458210790-6621-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/bcm2836.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index af29dd1f19..8451190a19 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -139,9 +139,13 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
/* Connect timers from the CPU to the interrupt controller */
qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS,
- qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
+ qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT,
qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
+ qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_HYP,
+ qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
+ qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_SEC,
+ qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
}
}