summaryrefslogtreecommitdiff
path: root/hw
diff options
context:
space:
mode:
authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2014-05-24 12:44:53 +0100
committerMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2014-06-05 20:51:57 +0100
commit01b91ac2be83e321853851437f69c0bc57ea4162 (patch)
treeaf59eb31298361a112b61457b784e8f70c91e3f6 /hw
parentd4ad9dec14aef3a61a23c2787bb660d07c943f04 (diff)
downloadqemu-01b91ac2be83e321853851437f69c0bc57ea4162.zip
tcx: move initialisation from realizefn to initfn
Initialisation cleanup as suggested by Andreas. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw')
-rw-r--r--hw/display/tcx.c46
-rw-r--r--hw/sparc/sun4m.c10
2 files changed, 33 insertions, 23 deletions
diff --git a/hw/display/tcx.c b/hw/display/tcx.c
index 8fc4e38bcf..28c742cc24 100644
--- a/hw/display/tcx.c
+++ b/hw/display/tcx.c
@@ -530,6 +530,33 @@ static const GraphicHwOps tcx24_ops = {
.gfx_update = tcx24_update_display,
};
+static void tcx_initfn(Object *obj)
+{
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ TCXState *s = TCX(obj);
+
+ memory_region_init_ram(&s->rom, NULL, "tcx.prom", FCODE_MAX_ROM_SIZE);
+ memory_region_set_readonly(&s->rom, true);
+ sysbus_init_mmio(sbd, &s->rom);
+
+ /* DAC */
+ memory_region_init_io(&s->dac, OBJECT(s), &tcx_dac_ops, s,
+ "tcx.dac", TCX_DAC_NREGS);
+ sysbus_init_mmio(sbd, &s->dac);
+
+ /* TEC (dummy) */
+ memory_region_init_io(&s->tec, OBJECT(s), &dummy_ops, s,
+ "tcx.tec", TCX_TEC_NREGS);
+ sysbus_init_mmio(sbd, &s->tec);
+
+ /* THC: NetBSD writes here even with 8-bit display: dummy */
+ memory_region_init_io(&s->thc24, OBJECT(s), &dummy_ops, s, "tcx.thc24",
+ TCX_THC_NREGS_24);
+ sysbus_init_mmio(sbd, &s->thc24);
+
+ return;
+}
+
static void tcx_realizefn(DeviceState *dev, Error **errp)
{
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
@@ -545,11 +572,7 @@ static void tcx_realizefn(DeviceState *dev, Error **errp)
vram_base = memory_region_get_ram_ptr(&s->vram_mem);
/* FCode ROM */
- memory_region_init_ram(&s->rom, NULL, "tcx.prom", FCODE_MAX_ROM_SIZE);
vmstate_register_ram_global(&s->rom);
- memory_region_set_readonly(&s->rom, true);
- sysbus_init_mmio(sbd, &s->rom);
-
fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, TCX_ROM_FILE);
if (fcode_filename) {
ret = load_image_targphys(fcode_filename, s->prom_addr,
@@ -568,20 +591,6 @@ static void tcx_realizefn(DeviceState *dev, Error **errp)
vram_offset += size;
vram_base += size;
- /* DAC */
- memory_region_init_io(&s->dac, OBJECT(s), &tcx_dac_ops, s,
- "tcx.dac", TCX_DAC_NREGS);
- sysbus_init_mmio(sbd, &s->dac);
-
- /* TEC (dummy) */
- memory_region_init_io(&s->tec, OBJECT(s), &dummy_ops, s,
- "tcx.tec", TCX_TEC_NREGS);
- sysbus_init_mmio(sbd, &s->tec);
- /* THC: NetBSD writes here even with 8-bit display: dummy */
- memory_region_init_io(&s->thc24, OBJECT(s), &dummy_ops, s, "tcx.thc24",
- TCX_THC_NREGS_24);
- sysbus_init_mmio(sbd, &s->thc24);
-
if (s->depth == 24) {
/* 24-bit plane */
size = s->vram_size * 4;
@@ -637,6 +646,7 @@ static const TypeInfo tcx_info = {
.name = TYPE_TCX,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(TCXState),
+ .instance_init = tcx_initfn,
.class_init = tcx_class_init,
};
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 4e793c2760..67e3663bfd 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -543,14 +543,14 @@ static void tcx_init(hwaddr addr, int vram_size, int width,
s = SYS_BUS_DEVICE(dev);
/* FCode ROM */
sysbus_mmio_map(s, 0, addr);
- /* 8-bit plane */
- sysbus_mmio_map(s, 1, addr + 0x00800000ULL);
/* DAC */
- sysbus_mmio_map(s, 2, addr + 0x00200000ULL);
+ sysbus_mmio_map(s, 1, addr + 0x00200000ULL);
/* TEC (dummy) */
- sysbus_mmio_map(s, 3, addr + 0x00700000ULL);
+ sysbus_mmio_map(s, 2, addr + 0x00700000ULL);
/* THC 24 bit: NetBSD writes here even with 8-bit display: dummy */
- sysbus_mmio_map(s, 4, addr + 0x00301000ULL);
+ sysbus_mmio_map(s, 3, addr + 0x00301000ULL);
+ /* 8-bit plane */
+ sysbus_mmio_map(s, 4, addr + 0x00800000ULL);
if (depth == 24) {
/* 24-bit plane */
sysbus_mmio_map(s, 5, addr + 0x02000000ULL);