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authorEden Mikitas <e.mikitas@gmail.com>2020-06-02 13:44:34 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-06-05 17:23:08 +0100
commit6d686145c86c9712db1547f66bebb7131979c61b (patch)
tree7116c6a358ce495922400c78181f444eb02eaaf9 /hw/ssi
parent9c49c83e4b23d31676633a1189faa6e70b489c01 (diff)
downloadqemu-6d686145c86c9712db1547f66bebb7131979c61b.zip
hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slave
When inserting the value retrieved (rx) from the spi slave, rx is pushed to rx_fifo after being cast to uint8_t. rx_fifo is a fifo32, and the rx register the driver uses is also 32 bit. This zeroes the 24 most significant bits of rx. This proved problematic with devices that expect to use the whole 32 bits of the rx register. Signed-off-by: Eden Mikitas <e.mikitas@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ssi')
-rw-r--r--hw/ssi/imx_spi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index 6fef5c7958..43b2f14dd2 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -206,7 +206,7 @@ static void imx_spi_flush_txfifo(IMXSPIState *s)
if (fifo32_is_full(&s->rx_fifo)) {
s->regs[ECSPI_STATREG] |= ECSPI_STATREG_RO;
} else {
- fifo32_push(&s->rx_fifo, (uint8_t)rx);
+ fifo32_push(&s->rx_fifo, rx);
}
if (s->burst_length <= 0) {