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authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2017-09-04 18:41:01 +0100
committerMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2017-09-04 18:41:01 +0100
commite1030ca5abc97e1465bc03776ebccaff1e9f7083 (patch)
treeb90e9eac7602f3bf7e8597ca461c0095f934c3cb /hw/sparc64
parent2b483739791b33c46e6084b51edcf62107058ae1 (diff)
downloadqemu-e1030ca5abc97e1465bc03776ebccaff1e9f7083.zip
sun4u: pass PCIDevice into pci_ebus_init() instead of PCIBus
In order to wire up the ebus PCI address spaces differently then we need access to the underlying PCIDevice. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'hw/sparc64')
-rw-r--r--hw/sparc64/sun4u.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index bbdb40c330..bcac7fcc42 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -224,13 +224,11 @@ static void isa_irq_handler(void *opaque, int n, int level)
/* EBUS (Eight bit bus) bridge */
static ISABus *
-pci_ebus_init(PCIBus *bus, int devfn, qemu_irq *irqs)
+pci_ebus_init(PCIDevice *pci_dev, qemu_irq *irqs)
{
qemu_irq *isa_irq;
- PCIDevice *pci_dev;
ISABus *isa_bus;
- pci_dev = pci_create_simple(bus, devfn, "ebus");
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
isa_irq = qemu_allocate_irqs(isa_irq_handler, irqs, 16);
isa_bus_irqs(isa_bus, isa_irq);
@@ -429,6 +427,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
unsigned int i;
uint64_t initrd_addr, initrd_size, kernel_addr, kernel_size, kernel_entry;
PCIBus *pci_bus, *pci_bus2, *pci_bus3;
+ PCIDevice *ebus;
ISABus *isa_bus;
SysBusDevice *s;
qemu_irq *ivec_irqs, *pbm_irqs;
@@ -452,7 +451,8 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
pci_vga_init(pci_bus);
// XXX Should be pci_bus3
- isa_bus = pci_ebus_init(pci_bus, -1, pbm_irqs);
+ ebus = pci_create_simple(pci_bus, -1, "ebus");
+ isa_bus = pci_ebus_init(ebus, pbm_irqs);
i = 0;
if (hwdef->console_serial_base) {