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author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2013-06-03 17:17:44 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2013-06-03 17:17:44 +0100 |
commit | 656f416c65d8ddbfd17500676865f0ac8f960801 (patch) | |
tree | e762e114a358cdb42ce4aa12d30c3c036cce7760 /hw/sd/sdhci.c | |
parent | b0b7ae6259e96e775315357c813b74e85637bf32 (diff) | |
download | qemu-656f416c65d8ddbfd17500676865f0ac8f960801.zip |
sd/sdhci.c: Only reset data_count on new commands
The data_count variable was being reset on every transfer, including
DMA transfer resumptions. This is incorrect, it should only be set
on a new command.
Manifests as a bug when using ADMA and there is a timer delay between
ADMA frames where the fifo is left in a non empty state.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
Message-id: 15a98609cc32315211b0963091a8efd67522e160.1369370934.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/sd/sdhci.c')
-rw-r--r-- | hw/sd/sdhci.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 91dc9b082d..0a84540e12 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -260,6 +260,7 @@ static void sdhci_send_command(SDHCIState *s) sdhci_update_irq(s); if (s->blksize && (s->cmdreg & SDHC_CMD_DATA_PRESENT)) { + s->data_count = 0; sdhci_do_data_transfer(s); } } @@ -773,7 +774,6 @@ static void sdhci_do_adma(SDHCIState *s) static void sdhci_data_transfer(SDHCIState *s) { SDHCIClass *k = SDHCI_GET_CLASS(s); - s->data_count = 0; if (s->trnmod & SDHC_TRNS_DMA) { switch (SDHC_DMA_TYPE(s->hostctl)) { |