diff options
author | Blue Swirl <blauwirbel@gmail.com> | 2009-07-20 10:37:51 +0000 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2009-07-20 10:37:51 +0000 |
commit | c0a2a096a0f1655e604370ab373bf96f6784b69b (patch) | |
tree | 8ec4695c737d63f8d2d72d6bf1945143473063e1 /hw/ppce500_pci.c | |
parent | 12a71a027c49db34d88ad69989d7c0bf6cca658d (diff) | |
download | qemu-c0a2a096a0f1655e604370ab373bf96f6784b69b.zip |
Fix build with DEBUG_PCI in pci_host.h enabled
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/ppce500_pci.c')
-rw-r--r-- | hw/ppce500_pci.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c index 1a8a6c9955..5b4673a82f 100644 --- a/hw/ppce500_pci.c +++ b/hw/ppce500_pci.c @@ -89,8 +89,8 @@ static uint32_t pcie500_cfgaddr_readl(void *opaque, target_phys_addr_t addr) { PPCE500PCIState *pci = opaque; - pci_debug("%s: (addr:%Lx) -> value:%x\n", __func__, addr, - pci->pci_state.config_reg); + pci_debug("%s: (addr:" TARGET_FMT_plx ") -> value:%x\n", __func__, addr, + pci->pci_state.config_reg); return pci->pci_state.config_reg; } @@ -105,7 +105,8 @@ static void pcie500_cfgaddr_writel(void *opaque, target_phys_addr_t addr, { PPCE500PCIState *controller = opaque; - pci_debug("%s: value:%x -> (addr%Lx)\n", __func__, value, addr); + pci_debug("%s: value:%x -> (addr:" TARGET_FMT_plx ")\n", __func__, value, + addr); controller->pci_state.config_reg = value & ~0x3; } @@ -169,7 +170,8 @@ static uint32_t pci_reg_read4(void *opaque, target_phys_addr_t addr) break; } - pci_debug("%s: win:%lx(addr:%Lx) -> value:%x\n",__func__,win,addr,value); + pci_debug("%s: win:%lx(addr:" TARGET_FMT_plx ") -> value:%x\n", __func__, + win, addr, value); return value; } @@ -187,7 +189,8 @@ static void pci_reg_write4(void *opaque, target_phys_addr_t addr, win = addr & 0xfe0; - pci_debug("%s: value:%x -> win:%lx(addr:%Lx)\n",__func__,value,win,addr); + pci_debug("%s: value:%x -> win:%lx(addr:" TARGET_FMT_plx ")\n", + __func__, value, win, addr); switch (win) { case PPCE500_PCI_OW1: |