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authorCédric Le Goater <clg@kaod.org>2017-12-01 17:06:01 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2017-12-15 09:49:24 +1100
commited0c37eedfdb953d61d1e0a41439cd404e914d9d (patch)
tree6a6f66658e2acfa014a20f76f5c6ac350b61ca23 /hw/ppc
parent4f7a47beebd6d37861d08c81941be1b33a0ae627 (diff)
downloadqemu-ed0c37eedfdb953d61d1e0a41439cd404e914d9d.zip
ppc/xics: assign of the CPU 'intc' pointer under the core
The 'intc' pointer of the CPU references the interrupt presenter in the XICS interrupt mode. When the XIVE interrupt mode is available and activated, the machine will need to reassign this pointer to reflect the change. Moving this assignment under the realize routine of the CPU will ease the process when the interrupt mode is toggled. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc')
-rw-r--r--hw/ppc/pnv_core.c2
-rw-r--r--hw/ppc/spapr_cpu_core.c3
2 files changed, 3 insertions, 2 deletions
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 8d966e0802..03317db853 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -133,7 +133,7 @@ static void pnv_core_realize_child(Object *child, XICSFabric *xi, Error **errp)
return;
}
- icp_create(child, TYPE_PNV_ICP, xi, &local_err);
+ cpu->intc = icp_create(child, TYPE_PNV_ICP, xi, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 70e757f808..032438b9ce 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -121,7 +121,8 @@ static void spapr_cpu_core_realize_child(Object *child,
goto error;
}
- icp_create(child, spapr->icp_type, XICS_FABRIC(spapr), &local_err);
+ cpu->intc = icp_create(child, spapr->icp_type, XICS_FABRIC(spapr),
+ &local_err);
if (local_err) {
goto error;
}