diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2020-12-12 00:15:30 +0000 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2021-01-06 11:09:59 +1100 |
commit | 59a958bb7451758d9120697b92237c0ae706abf3 (patch) | |
tree | c3059150b16c5410bfbb7c4dac76181e2ac28d7e /hw/ppc | |
parent | 52d25464605dc20022ad94aa8bc8e8473e600833 (diff) | |
download | qemu-59a958bb7451758d9120697b92237c0ae706abf3.zip |
hw/ppc/ppc4xx_devs: Make code style fixes to UIC code
In a following commit we will move the PPC UIC implementation to
its own file in hw/intc. To prevent checkpatch complaining about that
code-motion, fix up the minor style issues first.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20201212001537.24520-2-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc')
-rw-r--r-- | hw/ppc/ppc4xx_devs.c | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index f1651e04d9..f2f9ca4ffe 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -105,7 +105,7 @@ struct ppcuic_t { qemu_irq *irqs; }; -static void ppcuic_trigger_irq (ppcuic_t *uic) +static void ppcuic_trigger_irq(ppcuic_t *uic) { uint32_t ir, cr; int start, end, inc, i; @@ -156,26 +156,28 @@ static void ppcuic_trigger_irq (ppcuic_t *uic) } } -static void ppcuic_set_irq (void *opaque, int irq_num, int level) +static void ppcuic_set_irq(void *opaque, int irq_num, int level) { ppcuic_t *uic; uint32_t mask, sr; uic = opaque; - mask = 1U << (31-irq_num); + mask = 1U << (31 - irq_num); LOG_UIC("%s: irq %d level %d uicsr %08" PRIx32 " mask %08" PRIx32 " => %08" PRIx32 " %08" PRIx32 "\n", __func__, irq_num, level, uic->uicsr, mask, uic->uicsr & mask, level << irq_num); - if (irq_num < 0 || irq_num > 31) + if (irq_num < 0 || irq_num > 31) { return; + } sr = uic->uicsr; /* Update status register */ if (uic->uictr & mask) { /* Edge sensitive interrupt */ - if (level == 1) + if (level == 1) { uic->uicsr |= mask; + } } else { /* Level sensitive interrupt */ if (level == 1) { @@ -188,11 +190,12 @@ static void ppcuic_set_irq (void *opaque, int irq_num, int level) } LOG_UIC("%s: irq %d level %d sr %" PRIx32 " => " "%08" PRIx32 "\n", __func__, irq_num, level, uic->uicsr, sr); - if (sr != uic->uicsr) + if (sr != uic->uicsr) { ppcuic_trigger_irq(uic); + } } -static uint32_t dcr_read_uic (void *opaque, int dcrn) +static uint32_t dcr_read_uic(void *opaque, int dcrn) { ppcuic_t *uic; uint32_t ret; @@ -220,13 +223,15 @@ static uint32_t dcr_read_uic (void *opaque, int dcrn) ret = uic->uicsr & uic->uicer; break; case DCR_UICVR: - if (!uic->use_vectors) + if (!uic->use_vectors) { goto no_read; + } ret = uic->uicvr; break; case DCR_UICVCR: - if (!uic->use_vectors) + if (!uic->use_vectors) { goto no_read; + } ret = uic->uicvcr; break; default: @@ -238,7 +243,7 @@ static uint32_t dcr_read_uic (void *opaque, int dcrn) return ret; } -static void dcr_write_uic (void *opaque, int dcrn, uint32_t val) +static void dcr_write_uic(void *opaque, int dcrn, uint32_t val) { ppcuic_t *uic; |