diff options
| author | Michael Roth <mdroth@linux.vnet.ibm.com> | 2019-02-12 19:24:59 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-02-17 21:54:02 +1100 |
| commit | 94d1cc5f03a8f7e45925928d0c9a5ee9782e6c85 (patch) | |
| tree | 59c66ae00bd12efa21bd116ff00c8d38258dd95d /hw/pci | |
| parent | 0afed8c8195886111dd8ab0d078b189c55949521 (diff) | |
| download | qemu-94d1cc5f03a8f7e45925928d0c9a5ee9782e6c85.zip | |
qdev: pass an Object * to qbus_set_hotplug_handler()
Certain devices types, like memory/CPU, are now being handled using a
hotplug interface provided by a top-level MachineClass. Hotpluggable
host bridges are another such device where it makes sense to use a
machine-level hotplug handler. However, unlike those devices,
host-bridges have a parent bus (the main system bus), and devices with
a parent bus use a different mechanism for registering their hotplug
handlers: qbus_set_hotplug_handler(). This interface currently expects
a handler to be a subclass of DeviceClass, but this is not the case
for MachineClass, which derives directly from ObjectClass.
Internally, the interface only requires an ObjectClass, so expose that
in qbus_set_hotplug_handler().
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Acked-by: Halil Pasic <pasic@linux.ibm.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <154999589921.690774.3640149277362188566.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/pci')
| -rw-r--r-- | hw/pci/pcie.c | 2 | ||||
| -rw-r--r-- | hw/pci/shpc.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 230478faab..3f7c366093 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -543,7 +543,7 @@ void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot) dev->exp.hpev_notified = false; qbus_set_hotplug_handler(BUS(pci_bridge_get_sec_bus(PCI_BRIDGE(dev))), - DEVICE(dev), NULL); + OBJECT(dev), NULL); } void pcie_cap_slot_reset(PCIDevice *dev) diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c index 45053b39b9..52ccdc5ae3 100644 --- a/hw/pci/shpc.c +++ b/hw/pci/shpc.c @@ -648,7 +648,7 @@ int shpc_init(PCIDevice *d, PCIBus *sec_bus, MemoryRegion *bar, shpc_cap_update_dword(d); memory_region_add_subregion(bar, offset, &shpc->mmio); - qbus_set_hotplug_handler(BUS(sec_bus), DEVICE(d), NULL); + qbus_set_hotplug_handler(BUS(sec_bus), OBJECT(d), NULL); d->cap_present |= QEMU_PCI_CAP_SHPC; return 0; |