diff options
| author | Jiahui Cen <cenjiahui@huawei.com> | 2021-01-14 18:06:39 +0800 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2021-01-17 06:42:54 -0500 |
| commit | 0cf8882fd06ba0aeb1e90fa6f23fce85504d7e14 (patch) | |
| tree | bbfbe62606bbb7c220f8de8dc62b2181e3f000e5 /hw/pci-host | |
| parent | e41ee855283b79dfd0734e573e9b8d091070190b (diff) | |
| download | qemu-0cf8882fd06ba0aeb1e90fa6f23fce85504d7e14.zip | |
acpi/gpex: Inform os to keep firmware resource map
There may be some differences in pci resource assignment between guest os
and firmware.
Eg. A Bridge with Bus [d2]
-+-[0000:d2]---01.0-[d3]----01.0
where [d2:01.00] is a pcie-pci-bridge with BAR0 (mem, 64-bit, non-pref) [size=256]
[d3:01.00] is a PCI Device with BAR0 (mem, 64-bit, pref) [size=128K]
BAR4 (mem, 64-bit, pref) [size=64M]
In EDK2, the Resource Map would be:
PciBus: Resource Map for Bridge [D2|01|00]
Type = PMem64; Base = 0x8004000000; Length = 0x4100000; Alignment = 0x3FFFFFF
Base = 0x8004000000; Length = 0x4000000; Alignment = 0x3FFFFFF; Owner = PCI [D3|01|00:20]
Base = 0x8008000000; Length = 0x20000; Alignment = 0x1FFFF; Owner = PCI [D3|01|00:10]
Type = Mem64; Base = 0x8008100000; Length = 0x100; Alignment = 0xFFF
It would use 0x4100000 to calculate the root bus's PMem64 resource window.
While in Linux, kernel will use 0x1FFFFFF as the alignment to calculate
the PMem64 size, which would be 0x6000000. So kernel would try to
allocate 0x6000000 from the PMem64 resource window, but since the window
size is 0x4100000 as assigned by EDK2, the allocation would fail.
The diffences could result in resource assignment failure.
Using _DSM #5 method to inform guest os not to ignore the PCI configuration
that firmware has done at boot time could handle the differences.
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-5-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci-host')
| -rw-r--r-- | hw/pci-host/gpex-acpi.c | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c index 11b3db8f71..cb13e75d2f 100644 --- a/hw/pci-host/gpex-acpi.c +++ b/hw/pci-host/gpex-acpi.c @@ -112,10 +112,26 @@ static void acpi_dsdt_add_pci_osc(Aml *dev) UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); ifctx = aml_if(aml_equal(aml_arg(0), UUID)); ifctx1 = aml_if(aml_equal(aml_arg(2), aml_int(0))); - uint8_t byte_list[1] = {1}; - buf = aml_buffer(1, byte_list); + uint8_t byte_list[] = { + 0x1 << 0 /* support for functions other than function 0 */ | + 0x1 << 5 /* support for function 5 */ + }; + buf = aml_buffer(ARRAY_SIZE(byte_list), byte_list); aml_append(ifctx1, aml_return(buf)); aml_append(ifctx, ifctx1); + + /* + * PCI Firmware Specification 3.1 + * 4.6.5. _DSM for Ignoring PCI Boot Configurations + */ + /* Arg2: Function Index: 5 */ + ifctx1 = aml_if(aml_equal(aml_arg(2), aml_int(5))); + /* + * 0 - The operating system must not ignore the PCI configuration that + * firmware has done at boot time. + */ + aml_append(ifctx1, aml_return(aml_int(0))); + aml_append(ifctx, ifctx1); aml_append(method, ifctx); byte_list[0] = 0; |