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| author | Andreas Färber <afaerber@suse.de> | 2013-01-17 22:30:20 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-03-12 10:35:55 +0100 |
| commit | d8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5 (patch) | |
| tree | 57f8deccddd53e7aab5ca75d1d194da635a35790 /hw/openrisc | |
| parent | 259186a7d2f7184efc96ae99bc5658e6159f53ad (diff) | |
| download | qemu-d8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5.zip | |
exec: Pass CPUState to cpu_reset_interrupt()
Move it to qom/cpu.c to avoid build failures depending on include order
of cpu-qom.h and exec/cpu-all.h.
Change opaques of various ..._irq_handler() functions to the
appropriate CPU type to facilitate using cpu_reset_interrupt().
Fix Coding Style issues while at it (missing braces, indentation).
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/openrisc')
| -rw-r--r-- | hw/openrisc/pic_cpu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/openrisc/pic_cpu.c b/hw/openrisc/pic_cpu.c index 931511ec0f..7e4f9e015e 100644 --- a/hw/openrisc/pic_cpu.c +++ b/hw/openrisc/pic_cpu.c @@ -25,6 +25,7 @@ static void openrisc_pic_cpu_handler(void *opaque, int irq, int level) { OpenRISCCPU *cpu = (OpenRISCCPU *)opaque; + CPUState *cs = CPU(cpu); int i; uint32_t irq_bit = 1 << irq; @@ -42,7 +43,7 @@ static void openrisc_pic_cpu_handler(void *opaque, int irq, int level) if ((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i))) { cpu_interrupt(&cpu->env, CPU_INTERRUPT_HARD); } else { - cpu_reset_interrupt(&cpu->env, CPU_INTERRUPT_HARD); + cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); cpu->env.picsr &= ~(1 << i); } } |