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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-29 10:34:01 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-29 10:34:01 +0000
commit3efda49d150def64f69a79cbd8da760ea15a79b7 (patch)
treeaafc57f460e5db9e5701cc9f89bec84545143b5f /hw/omap.c
parent8c9d7f83bf1f2d61f0fdd5fbc030ab67c8f433e7 (diff)
downloadqemu-3efda49d150def64f69a79cbd8da760ea15a79b7.zip
Add a TI TSC2102 chip (touchscreen/ADC/audio-CODEC controller).
Fix GPIO memory mapping address and register width. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3484 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/omap.c')
-rw-r--r--hw/omap.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/hw/omap.c b/hw/omap.c
index cfb7d2bfec..d6978d8ebc 100644
--- a/hw/omap.c
+++ b/hw/omap.c
@@ -3184,16 +3184,17 @@ static void omap_gpio_write(void *opaque, target_phys_addr_t addr,
}
}
+/* *Some* sources say the memory region is 32-bit. */
static CPUReadMemoryFunc *omap_gpio_readfn[] = {
+ omap_badwidth_read16,
omap_gpio_read,
- omap_badwidth_read32,
- omap_badwidth_read32,
+ omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_gpio_writefn[] = {
+ omap_badwidth_write16,
omap_gpio_write,
- omap_badwidth_write32,
- omap_badwidth_write32,
+ omap_badwidth_write16,
};
void omap_gpio_reset(struct omap_gpio_s *s)
@@ -3551,7 +3552,7 @@ struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
s->irq[1][OMAP_INT_KEYBOARD], s->irq[1][OMAP_INT_MPUIO],
s->wakeup, omap_findclk(s, "clk32-kHz"));
- s->gpio = omap_gpio_init(0xfffcf000, s->irq[0][OMAP_INT_GPIO_BANK1],
+ s->gpio = omap_gpio_init(0xfffce000, s->irq[0][OMAP_INT_GPIO_BANK1],
omap_findclk(s, "mpuper_ck"));
s->microwire = omap_uwire_init(0xfffb3000, &s->irq[1][OMAP_INT_uWireTX],