summaryrefslogtreecommitdiff
path: root/hw/mips
diff options
context:
space:
mode:
authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-01-04 11:50:15 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-01-14 17:13:53 +0100
commitce49581feb1006be21707713d86c05bb189e3f66 (patch)
tree10ccbb670d9c5e70b2be5560cb8eca9c2b4ace8b /hw/mips
parentb0586b38cb51dccb25a1957796e34ecd99c8fbf7 (diff)
downloadqemu-ce49581feb1006be21707713d86c05bb189e3f66.zip
hw/mips/boston: Check 64-bit support with cpu_type_is_64bit()
Directly check if the CPU supports 64-bit with the recently added cpu_type_is_64bit() helper (inlined). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210104221154.3127610-6-f4bug@amsat.org>
Diffstat (limited to 'hw/mips')
-rw-r--r--hw/mips/boston.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index c3b94c68e1..467fbc1c8b 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -444,7 +444,6 @@ static void boston_mach_init(MachineState *machine)
DriveInfo *hd[6];
Chardev *chr;
int fw_size, fit_err;
- bool is_64b;
if ((machine->ram_size % GiB) ||
(machine->ram_size > (2 * GiB))) {
@@ -463,8 +462,6 @@ static void boston_mach_init(MachineState *machine)
exit(1);
}
- is_64b = cpu_type_supports_isa(machine->cpu_type, ISA_MIPS64);
-
object_initialize_child(OBJECT(machine), "cps", &s->cps, TYPE_MIPS_CPS);
object_property_set_str(OBJECT(&s->cps), "cpu-type", machine->cpu_type,
&error_fatal);
@@ -545,7 +542,8 @@ static void boston_mach_init(MachineState *machine)
}
gen_firmware(memory_region_get_ram_ptr(flash) + 0x7c00000,
- s->kernel_entry, s->fdt_base, is_64b);
+ s->kernel_entry, s->fdt_base,
+ cpu_type_is_64bit(machine->cpu_type));
} else if (!qtest_enabled()) {
error_report("Please provide either a -kernel or -bios argument");
exit(1);