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authorFilip Bozuta <Filip.Bozuta@rt-rk.com>2019-12-06 14:58:03 +0100
committerAleksandar Markovic <amarkovic@wavecomp.com>2019-12-16 13:04:46 +0100
commit68fa5f552ac2846251ad1025829799a515b16f11 (patch)
tree8b3d2e2e03986c7945297a9934f1dc7b786692bd /hw/mips
parent084a398bf8aa7634738e6c6c0103236ee1b3b72f (diff)
downloadqemu-68fa5f552ac2846251ad1025829799a515b16f11.zip
mips: jazz: Renovate coding style
The script checkpatch.pl located in scripts folder was used to detect all errors and warrnings in files: hw/mips/mips_jazz.c hw/display/jazz_led.c hw/dma/rc4030.c All these mips jazz machine files were edited and all the errors and warrings generated by the checkpatch.pl script were corrected and then the script was ran again to make sure there are no more errors and warnings. Signed-off-by: Filip Bozuta <Filip.Bozuta@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1575640687-20744-2-git-send-email-Filip.Bozuta@rt-rk.com>
Diffstat (limited to 'hw/mips')
-rw-r--r--hw/mips/mips_jazz.c32
1 files changed, 19 insertions, 13 deletions
diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index d978bb64a0..ac4d7acb2b 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -52,8 +52,7 @@
#include "qemu/error-report.h"
#include "qemu/help_option.h"
-enum jazz_model_e
-{
+enum jazz_model_e {
JAZZ_MAGNUM,
JAZZ_PICA61,
};
@@ -90,16 +89,20 @@ static const MemoryRegionOps rtc_ops = {
static uint64_t dma_dummy_read(void *opaque, hwaddr addr,
unsigned size)
{
- /* Nothing to do. That is only to ensure that
- * the current DMA acknowledge cycle is completed. */
+ /*
+ * Nothing to do. That is only to ensure that
+ * the current DMA acknowledge cycle is completed.
+ */
return 0xff;
}
static void dma_dummy_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
- /* Nothing to do. That is only to ensure that
- * the current DMA acknowledge cycle is completed. */
+ /*
+ * Nothing to do. That is only to ensure that
+ * the current DMA acknowledge cycle is completed.
+ */
}
static const MemoryRegionOps dma_dummy_ops = {
@@ -109,8 +112,8 @@ static const MemoryRegionOps dma_dummy_ops = {
};
#define MAGNUM_BIOS_SIZE_MAX 0x7e000
-#define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
-
+#define MAGNUM_BIOS_SIZE \
+ (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
static void (*real_do_transaction_failed)(CPUState *cpu, hwaddr physaddr,
vaddr addr, unsigned size,
MMUAccessType access_type,
@@ -201,8 +204,9 @@ static void mips_jazz_init(MachineState *machine,
memory_region_add_subregion(address_space, 0xfff00000LL, bios2);
/* load the BIOS image. */
- if (bios_name == NULL)
+ if (bios_name == NULL) {
bios_name = BIOS_FILENAME;
+ }
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
bios_size = load_image_targphys(filename, 0xfff00000LL,
@@ -229,7 +233,8 @@ static void mips_jazz_init(MachineState *machine,
sysbus_mmio_get_region(sysbus, 0));
memory_region_add_subregion(address_space, 0xf0000000,
sysbus_mmio_get_region(sysbus, 1));
- memory_region_init_io(dma_dummy, NULL, &dma_dummy_ops, NULL, "dummy_dma", 0x1000);
+ memory_region_init_io(dma_dummy, NULL, &dma_dummy_ops,
+ NULL, "dummy_dma", 0x1000);
memory_region_add_subregion(address_space, 0x8000d000, dma_dummy);
/* ISA bus: IO space at 0x90000000, mem space at 0x91000000 */
@@ -276,8 +281,9 @@ static void mips_jazz_init(MachineState *machine,
/* Network controller */
for (n = 0; n < nb_nics; n++) {
nd = &nd_table[n];
- if (!nd->model)
+ if (!nd->model) {
nd->model = g_strdup("dp83932");
+ }
if (strcmp(nd->model, "dp83932") == 0) {
qemu_check_nic_model(nd, "dp83932");
@@ -338,12 +344,12 @@ static void mips_jazz_init(MachineState *machine,
/* Serial ports */
if (serial_hd(0)) {
serial_mm_init(address_space, 0x80006000, 0,
- qdev_get_gpio_in(rc4030, 8), 8000000/16,
+ qdev_get_gpio_in(rc4030, 8), 8000000 / 16,
serial_hd(0), DEVICE_NATIVE_ENDIAN);
}
if (serial_hd(1)) {
serial_mm_init(address_space, 0x80007000, 0,
- qdev_get_gpio_in(rc4030, 9), 8000000/16,
+ qdev_get_gpio_in(rc4030, 9), 8000000 / 16,
serial_hd(1), DEVICE_NATIVE_ENDIAN);
}