diff options
author | Juan Quintela <quintela@redhat.com> | 2009-09-10 03:04:43 +0200 |
---|---|---|
committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-09-11 11:10:08 -0500 |
commit | 3e9e98889b8cac0925dbfd8766c56615a7575338 (patch) | |
tree | fa034b5214ab1fc5e6cea818c385ffe05f811e1e /hw/ioapic.c | |
parent | 80a04bbe90bc0f87c8f985ce1a62084b0485faa9 (diff) | |
download | qemu-3e9e98889b8cac0925dbfd8766c56615a7575338.zip |
vmstate: port ioapic device
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/ioapic.c')
-rw-r--r-- | hw/ioapic.c | 39 |
1 files changed, 12 insertions, 27 deletions
diff --git a/hw/ioapic.c b/hw/ioapic.c index b232527afe..b0ad78f241 100644 --- a/hw/ioapic.c +++ b/hw/ioapic.c @@ -191,33 +191,18 @@ static void ioapic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t va } } -static void ioapic_save(QEMUFile *f, void *opaque) -{ - IOAPICState *s = opaque; - int i; - - qemu_put_8s(f, &s->id); - qemu_put_8s(f, &s->ioregsel); - for (i = 0; i < IOAPIC_NUM_PINS; i++) { - qemu_put_be64s(f, &s->ioredtbl[i]); - } -} - -static int ioapic_load(QEMUFile *f, void *opaque, int version_id) -{ - IOAPICState *s = opaque; - int i; - - if (version_id != 1) - return -EINVAL; - - qemu_get_8s(f, &s->id); - qemu_get_8s(f, &s->ioregsel); - for (i = 0; i < IOAPIC_NUM_PINS; i++) { - qemu_get_be64s(f, &s->ioredtbl[i]); +static const VMStateDescription vmstate_ioapic = { + .name = "ioapic", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .fields = (VMStateField []) { + VMSTATE_UINT8(id, IOAPICState), + VMSTATE_UINT8(ioregsel, IOAPICState), + VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICState, IOAPIC_NUM_PINS), + VMSTATE_END_OF_LIST() } - return 0; -} +}; static void ioapic_reset(void *opaque) { @@ -254,7 +239,7 @@ qemu_irq *ioapic_init(void) ioapic_mem_write, s); cpu_register_physical_memory(0xfec00000, 0x1000, io_memory); - register_savevm("ioapic", 0, 1, ioapic_save, ioapic_load, s); + vmstate_register(0, &vmstate_ioapic, s); qemu_register_reset(ioapic_reset, s); irq = qemu_allocate_irqs(ioapic_set_irq, s, IOAPIC_NUM_PINS); |