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authorMarc-André Lureau <marcandre.lureau@redhat.com>2019-10-17 18:42:35 +0200
committerMarc-André Lureau <marcandre.lureau@redhat.com>2020-01-07 17:24:29 +0400
commitab4c072d2f2f4d2e4bfa54bb89e43e2b4cb86275 (patch)
tree34f1dc9f3bcd7bd8187debedeb775b939e87d2b2 /hw/intc
parent3110ce819278f1b6d2c4fdd3e15e773e8f226316 (diff)
downloadqemu-ab4c072d2f2f4d2e4bfa54bb89e43e2b4cb86275.zip
leon3: use qemu_irq framework instead of callback as property
"set_pin_in" property is used to define a callback mechanism where the device says "call the callback function, passing it an opaque cookie and a 32-bit value". We already have a generic mechanism for doing that, which is the qemu_irq. So we should just use that. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com>
Diffstat (limited to 'hw/intc')
-rw-r--r--hw/intc/grlib_irqmp.c35
1 files changed, 4 insertions, 31 deletions
diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c
index bc78e1a14f..794c643af2 100644
--- a/hw/intc/grlib_irqmp.c
+++ b/hw/intc/grlib_irqmp.c
@@ -25,6 +25,7 @@
*/
#include "qemu/osdep.h"
+#include "hw/irq.h"
#include "hw/sysbus.h"
#include "cpu.h"
@@ -58,10 +59,8 @@ typedef struct IRQMP {
MemoryRegion iomem;
- void *set_pil_in;
- void *set_pil_in_opaque;
-
IRQMPState *state;
+ qemu_irq irq;
} IRQMP;
struct IRQMPState {
@@ -82,7 +81,6 @@ static void grlib_irqmp_check_irqs(IRQMPState *state)
uint32_t pend = 0;
uint32_t level0 = 0;
uint32_t level1 = 0;
- set_pil_in_fn set_pil_in;
assert(state != NULL);
assert(state->parent != NULL);
@@ -97,14 +95,8 @@ static void grlib_irqmp_check_irqs(IRQMPState *state)
trace_grlib_irqmp_check_irqs(state->pending, state->force[0],
state->mask[0], level1, level0);
- set_pil_in = (set_pil_in_fn)state->parent->set_pil_in;
-
/* Trigger level1 interrupt first and level0 if there is no level1 */
- if (level1 != 0) {
- set_pil_in(state->parent->set_pil_in_opaque, level1);
- } else {
- set_pil_in(state->parent->set_pil_in_opaque, level0);
- }
+ qemu_set_irq(state->parent->irq, level1 ?: level0);
}
static void grlib_irqmp_ack_mask(IRQMPState *state, uint32_t mask)
@@ -335,6 +327,7 @@ static void grlib_irqmp_init(Object *obj)
IRQMP *irqmp = GRLIB_IRQMP(obj);
SysBusDevice *dev = SYS_BUS_DEVICE(obj);
+ qdev_init_gpio_out_named(DEVICE(obj), &irqmp->irq, "grlib-irq", 1);
memory_region_init_io(&irqmp->iomem, obj, &grlib_irqmp_ops, irqmp,
"irqmp", IRQMP_REG_SIZE);
@@ -343,31 +336,11 @@ static void grlib_irqmp_init(Object *obj)
sysbus_init_mmio(dev, &irqmp->iomem);
}
-static void grlib_irqmp_realize(DeviceState *dev, Error **errp)
-{
- IRQMP *irqmp = GRLIB_IRQMP(dev);
-
- /* Check parameters */
- if (irqmp->set_pil_in == NULL) {
- error_setg(errp, "set_pil_in cannot be NULL.");
- }
-}
-
-static Property grlib_irqmp_properties[] = {
- DEFINE_PROP_PTR("set_pil_in", IRQMP, set_pil_in),
- DEFINE_PROP_PTR("set_pil_in_opaque", IRQMP, set_pil_in_opaque),
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void grlib_irqmp_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->reset = grlib_irqmp_reset;
- dc->props = grlib_irqmp_properties;
- /* Reason: pointer properties "set_pil_in", "set_pil_in_opaque" */
- dc->user_creatable = false;
- dc->realize = grlib_irqmp_realize;
}
static const TypeInfo grlib_irqmp_info = {