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authorCédric Le Goater <clg@kaod.org>2019-11-15 17:24:20 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2019-12-17 10:39:47 +1100
commit1c27b252e7b5d6a54f5083781b1d2a0e425b04df (patch)
tree1dea6587c761d4854c106f5e820476c3d5bafdf4 /hw/intc
parent7065d0670a7a542633d33d639623f60663384ffd (diff)
downloadqemu-1c27b252e7b5d6a54f5083781b1d2a0e425b04df.zip
ppc/xive: Check V bit in TM_PULL_POOL_CTX
A context should be 'valid' when pulled from the thread interrupt context registers. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191115162436.30548-8-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/intc')
-rw-r--r--hw/intc/xive.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 42e9a11ef7..511e1a9363 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -377,6 +377,11 @@ static uint64_t xive_tm_pull_os_ctx(XiveTCTX *tctx, hwaddr offset,
qw1w2 = xive_tctx_get_os_cam(tctx, &nvt_blk, &nvt_idx, &vo);
+ if (!vo) {
+ qemu_log_mask(LOG_GUEST_ERROR, "XIVE: pulling invalid NVT %x/%x !?\n",
+ nvt_blk, nvt_idx);
+ }
+
/* Invalidate CAM line */
qw1w2_new = xive_set_field32(TM_QW1W2_VO, qw1w2, 0);
xive_tctx_set_os_cam(tctx, qw1w2_new);