diff options
| author | Corey Minyard <cminyard@mvista.com> | 2018-08-20 15:26:08 -0500 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2018-08-23 18:46:25 +0200 |
| commit | 45726b6e2c6075826cacd87f7bdde372589b7cf3 (patch) | |
| tree | ad993f6dc9b665b5644cbb992ee35acf090b24a9 /hw/i2c | |
| parent | 12bd93c150239020803b1ae08af819cd38e55360 (diff) | |
| download | qemu-45726b6e2c6075826cacd87f7bdde372589b7cf3.zip | |
i2c: pm_smbus: Add the ability to force block transfer enable
The PIIX4 hardware has block transfer buffer always enabled in
the hardware, but the i801 does not. Add a parameter to pm_smbus_init
to force on the block transfer so the PIIX4 handler can enable this
by default, as it was disabled by default before.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <1534796770-10295-9-git-send-email-minyard@acm.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/i2c')
| -rw-r--r-- | hw/i2c/pm_smbus.c | 5 | ||||
| -rw-r--r-- | hw/i2c/smbus_ich9.c | 2 |
2 files changed, 5 insertions, 2 deletions
diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c index 91ee444590..685a2378ed 100644 --- a/hw/i2c/pm_smbus.c +++ b/hw/i2c/pm_smbus.c @@ -402,11 +402,14 @@ static const MemoryRegionOps pm_smbus_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -void pm_smbus_init(DeviceState *parent, PMSMBus *smb) +void pm_smbus_init(DeviceState *parent, PMSMBus *smb, bool force_aux_blk) { smb->op_done = true; smb->reset = pm_smbus_reset; smb->smbus = i2c_init_bus(parent, "i2c"); + if (force_aux_blk) { + smb->smb_auxctl |= AUX_BLK; + } memory_region_init_io(&smb->io, OBJECT(parent), &pm_smbus_ops, smb, "pm-smbus", 64); } diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c index 522a703c26..2a8b49e02f 100644 --- a/hw/i2c/smbus_ich9.c +++ b/hw/i2c/smbus_ich9.c @@ -86,7 +86,7 @@ static void ich9_smbus_realize(PCIDevice *d, Error **errp) pci_set_byte(d->config + ICH9_SMB_HOSTC, 0); /* TODO bar0, bar1: 64bit BAR support*/ - pm_smbus_init(&d->qdev, &s->smb); + pm_smbus_init(&d->qdev, &s->smb, false); pci_register_bar(d, ICH9_SMB_SMB_BASE_BAR, PCI_BASE_ADDRESS_SPACE_IO, &s->smb.io); } |