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authorAndreas Färber <andreas.faerber@web.de>2013-06-30 19:29:36 +0200
committerAndreas Färber <afaerber@suse.de>2013-11-05 17:47:29 +0100
commitfc719d77412513a07b718e1f083b64dbcac62524 (patch)
treef4cb8282a645d4e55a955fc897f9ffd8e91720b4 /hw/cpu
parent9eb39db520cea30620b24098b6d731f78cc819a0 (diff)
downloadqemu-fc719d77412513a07b718e1f083b64dbcac62524.zip
a9mpcore: Embed A9SCUState
Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Diffstat (limited to 'hw/cpu')
-rw-r--r--hw/cpu/a9mpcore.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c
index c57b149536..df92e3fff7 100644
--- a/hw/cpu/a9mpcore.c
+++ b/hw/cpu/a9mpcore.c
@@ -10,6 +10,7 @@
#include "hw/sysbus.h"
#include "hw/intc/arm_gic.h"
+#include "hw/misc/a9scu.h"
#define TYPE_A9MPCORE_PRIV "a9mpcore_priv"
#define A9MPCORE_PRIV(obj) \
@@ -24,10 +25,10 @@ typedef struct A9MPPrivState {
MemoryRegion container;
DeviceState *mptimer;
DeviceState *wdt;
- DeviceState *scu;
uint32_t num_irq;
GICState gic;
+ A9SCUState scu;
} A9MPPrivState;
static void a9mp_priv_set_irq(void *opaque, int irq, int level)
@@ -46,12 +47,15 @@ static void a9mp_priv_initfn(Object *obj)
object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC);
qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default());
+
+ object_initialize(&s->scu, sizeof(s->scu), TYPE_A9_SCU);
+ qdev_set_parent_bus(DEVICE(&s->scu), sysbus_get_default());
}
static int a9mp_priv_init(SysBusDevice *dev)
{
A9MPPrivState *s = A9MPCORE_PRIV(dev);
- DeviceState *gicdev;
+ DeviceState *gicdev, *scudev;
SysBusDevice *timerbusdev, *wdtbusdev, *gicbusdev, *scubusdev;
int i;
@@ -67,10 +71,10 @@ static int a9mp_priv_init(SysBusDevice *dev)
/* Pass through inbound GPIO lines to the GIC */
qdev_init_gpio_in(DEVICE(dev), a9mp_priv_set_irq, s->num_irq - 32);
- s->scu = qdev_create(NULL, "a9-scu");
- qdev_prop_set_uint32(s->scu, "num-cpu", s->num_cpu);
- qdev_init_nofail(s->scu);
- scubusdev = SYS_BUS_DEVICE(s->scu);
+ scudev = DEVICE(&s->scu);
+ qdev_prop_set_uint32(scudev, "num-cpu", s->num_cpu);
+ qdev_init_nofail(scudev);
+ scubusdev = SYS_BUS_DEVICE(&s->scu);
s->mptimer = qdev_create(NULL, "arm_mptimer");
qdev_prop_set_uint32(s->mptimer, "num-cpu", s->num_cpu);