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author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2018-06-21 14:12:50 -0300 |
---|---|---|
committer | Stefan Hajnoczi <stefanha@redhat.com> | 2018-06-29 15:04:18 +0100 |
commit | cb2d721cb3a2a83084141952f09a7363e2f52705 (patch) | |
tree | 1dbe804f8e06e97241be1a1b36eba791d7a9f082 /hw/char/parallel.c | |
parent | 0060918661faac174c7e75103ebd4d964c91c02e (diff) | |
download | qemu-cb2d721cb3a2a83084141952f09a7363e2f52705.zip |
hw/char/parallel: Convert from pdebug() macro to trace events
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw/char/parallel.c')
-rw-r--r-- | hw/char/parallel.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/hw/char/parallel.c b/hw/char/parallel.c index 35748e6c1b..a80da47ecf 100644 --- a/hw/char/parallel.c +++ b/hw/char/parallel.c @@ -30,6 +30,7 @@ #include "hw/isa/isa.h" #include "hw/char/parallel.h" #include "sysemu/sysemu.h" +#include "trace.h" //#define DEBUG_PARALLEL @@ -110,9 +111,8 @@ parallel_ioport_write_sw(void *opaque, uint32_t addr, uint32_t val) { ParallelState *s = opaque; - pdebug("write addr=0x%02x val=0x%02x\n", addr, val); - addr &= 7; + trace_parallel_ioport_write("SW", addr, val); switch(addr) { case PARA_REG_DATA: s->dataw = val; @@ -157,6 +157,7 @@ static void parallel_ioport_write_hw(void *opaque, uint32_t addr, uint32_t val) s->last_read_offset = ~0U; addr &= 7; + trace_parallel_ioport_write("HW", addr, val); switch(addr) { case PARA_REG_DATA: if (s->dataw == val) @@ -230,6 +231,8 @@ parallel_ioport_eppdata_write_hw2(void *opaque, uint32_t addr, uint32_t val) struct ParallelIOArg ioarg = { .buffer = &eppdata, .count = sizeof(eppdata) }; + + trace_parallel_ioport_write("EPP", addr, val); if ((s->control & (PARA_CTR_DIR|PARA_CTR_SIGNAL)) != PARA_CTR_INIT) { /* Controls not correct for EPP data cycle, so do nothing */ pdebug("we%04x s\n", val); @@ -253,6 +256,8 @@ parallel_ioport_eppdata_write_hw4(void *opaque, uint32_t addr, uint32_t val) struct ParallelIOArg ioarg = { .buffer = &eppdata, .count = sizeof(eppdata) }; + + trace_parallel_ioport_write("EPP", addr, val); if ((s->control & (PARA_CTR_DIR|PARA_CTR_SIGNAL)) != PARA_CTR_INIT) { /* Controls not correct for EPP data cycle, so do nothing */ pdebug("we%08x s\n", val); @@ -299,7 +304,7 @@ static uint32_t parallel_ioport_read_sw(void *opaque, uint32_t addr) ret = s->control; break; } - pdebug("read addr=0x%02x val=0x%02x\n", addr, ret); + trace_parallel_ioport_read("SW", addr, ret); return ret; } @@ -371,6 +376,7 @@ static uint32_t parallel_ioport_read_hw(void *opaque, uint32_t addr) } break; } + trace_parallel_ioport_read("HW", addr, ret); s->last_read_offset = addr; return ret; } @@ -399,6 +405,7 @@ parallel_ioport_eppdata_read_hw2(void *opaque, uint32_t addr) } else pdebug("re%04x\n", ret); + trace_parallel_ioport_read("EPP", addr, ret); return ret; } @@ -426,11 +433,13 @@ parallel_ioport_eppdata_read_hw4(void *opaque, uint32_t addr) } else pdebug("re%08x\n", ret); + trace_parallel_ioport_read("EPP", addr, ret); return ret; } static void parallel_ioport_ecp_write(void *opaque, uint32_t addr, uint32_t val) { + trace_parallel_ioport_write("ECP", addr & 7, val); pdebug("wecp%d=%02x\n", addr & 7, val); } @@ -438,6 +447,7 @@ static uint32_t parallel_ioport_ecp_read(void *opaque, uint32_t addr) { uint8_t ret = 0xff; + trace_parallel_ioport_read("ECP", addr & 7, ret); pdebug("recp%d:%02x\n", addr & 7, ret); return ret; } |