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| author | Peter Maydell <peter.maydell@linaro.org> | 2012-04-13 11:39:09 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-04-13 12:29:04 +0000 |
| commit | 0d256bdc8f540a52fe1f0475aeeed3bc9f6e2de4 (patch) | |
| tree | a07a35b01cbc82efe42fc82bdfa558385a4f2968 /hw/armv7m_nvic.c | |
| parent | aecff6924dab0197b6c8f132e44502b25fd98a38 (diff) | |
| download | qemu-0d256bdc8f540a52fe1f0475aeeed3bc9f6e2de4.zip | |
hw/arm_gic: Use NVIC instead of LEGACY_INCLUDED_GIC define
Now all the A profile cores have been switched to use the standalone
sysbus GIC, the only remaining code which #includes arm_gic.c is
the v7M NVIC. The coupling is much closer here so it's not so
easily disentangled. For now, add a comment about how arm_gic.c
is compiled, and assume that the NVIC always includes arm_gic.c
and the non-NVIC GIC is always compiled standalone.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/armv7m_nvic.c')
| -rw-r--r-- | hw/armv7m_nvic.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c index 5cfa971cab..986a6bbd0c 100644 --- a/hw/armv7m_nvic.c +++ b/hw/armv7m_nvic.c @@ -16,7 +16,6 @@ #include "exec-memory.h" #define NVIC 1 -#define LEGACY_INCLUDED_GIC static uint32_t nvic_readl(void *opaque, uint32_t offset); static void nvic_writel(void *opaque, uint32_t offset, uint32_t value); |