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authorPeter Maydell <peter.maydell@linaro.org>2021-02-15 11:51:26 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-03-06 13:30:39 +0000
commit424182791bae6dc9526b7e6d149848f237dbc046 (patch)
tree31ce368248cf8e75b0b036e74e5045d6f57139a0 /hw/arm/mps2-tz.c
parentfee887a7b067faf1f9bc2d6c1d5fef787aadaf4a (diff)
downloadqemu-424182791bae6dc9526b7e6d149848f237dbc046.zip
hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrupts
The mps2-tz code uses PPCPortInfo data structures to define what devices are present and how they are wired up. Currently we use these to specify device types and addresses, but hard-code the interrupt line wiring in each make_* helper function. This works for the two boards we have at the moment, but the AN524 has some devices with different interrupt assignments. This commit adds the framework to allow PPCPortInfo structures to specify interrupt numbers. We add an array of interrupt numbers to the PPCPortInfo struct, and pass it through to the make_* helpers. The following commit will change the make_* helpers over to using the framework. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210215115138.20465-13-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm/mps2-tz.c')
-rw-r--r--hw/arm/mps2-tz.c36
1 files changed, 24 insertions, 12 deletions
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index b9b1351fa7..34ea3389bd 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -170,7 +170,8 @@ static qemu_irq get_sse_irq_in(MPS2TZMachineState *mms, int irqno)
* needs to be plugged into the downstream end of the PPC port.
*/
typedef MemoryRegion *MakeDevFn(MPS2TZMachineState *mms, void *opaque,
- const char *name, hwaddr size);
+ const char *name, hwaddr size,
+ const int *irqs);
typedef struct PPCPortInfo {
const char *name;
@@ -178,6 +179,7 @@ typedef struct PPCPortInfo {
void *opaque;
hwaddr addr;
hwaddr size;
+ int irqs[3]; /* currently no device needs more IRQ lines than this */
} PPCPortInfo;
typedef struct PPCInfo {
@@ -186,8 +188,9 @@ typedef struct PPCInfo {
} PPCInfo;
static MemoryRegion *make_unimp_dev(MPS2TZMachineState *mms,
- void *opaque,
- const char *name, hwaddr size)
+ void *opaque,
+ const char *name, hwaddr size,
+ const int *irqs)
{
/* Initialize, configure and realize a TYPE_UNIMPLEMENTED_DEVICE,
* and return a pointer to its MemoryRegion.
@@ -202,7 +205,8 @@ static MemoryRegion *make_unimp_dev(MPS2TZMachineState *mms,
}
static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque,
- const char *name, hwaddr size)
+ const char *name, hwaddr size,
+ const int *irqs)
{
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
CMSDKAPBUART *uart = opaque;
@@ -227,7 +231,8 @@ static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque,
}
static MemoryRegion *make_scc(MPS2TZMachineState *mms, void *opaque,
- const char *name, hwaddr size)
+ const char *name, hwaddr size,
+ const int *irqs)
{
MPS2SCC *scc = opaque;
DeviceState *sccdev;
@@ -249,7 +254,8 @@ static MemoryRegion *make_scc(MPS2TZMachineState *mms, void *opaque,
}
static MemoryRegion *make_fpgaio(MPS2TZMachineState *mms, void *opaque,
- const char *name, hwaddr size)
+ const char *name, hwaddr size,
+ const int *irqs)
{
MPS2FPGAIO *fpgaio = opaque;
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
@@ -262,7 +268,8 @@ static MemoryRegion *make_fpgaio(MPS2TZMachineState *mms, void *opaque,
}
static MemoryRegion *make_eth_dev(MPS2TZMachineState *mms, void *opaque,
- const char *name, hwaddr size)
+ const char *name, hwaddr size,
+ const int *irqs)
{
SysBusDevice *s;
NICInfo *nd = &nd_table[0];
@@ -281,7 +288,8 @@ static MemoryRegion *make_eth_dev(MPS2TZMachineState *mms, void *opaque,
}
static MemoryRegion *make_mpc(MPS2TZMachineState *mms, void *opaque,
- const char *name, hwaddr size)
+ const char *name, hwaddr size,
+ const int *irqs)
{
TZMPC *mpc = opaque;
int i = mpc - &mms->ssram_mpc[0];
@@ -318,7 +326,8 @@ static MemoryRegion *make_mpc(MPS2TZMachineState *mms, void *opaque,
}
static MemoryRegion *make_dma(MPS2TZMachineState *mms, void *opaque,
- const char *name, hwaddr size)
+ const char *name, hwaddr size,
+ const int *irqs)
{
PL080State *dma = opaque;
int i = dma - &mms->dma[0];
@@ -373,7 +382,8 @@ static MemoryRegion *make_dma(MPS2TZMachineState *mms, void *opaque,
}
static MemoryRegion *make_spi(MPS2TZMachineState *mms, void *opaque,
- const char *name, hwaddr size)
+ const char *name, hwaddr size,
+ const int *irqs)
{
/*
* The AN505 has five PL022 SPI controllers.
@@ -395,7 +405,8 @@ static MemoryRegion *make_spi(MPS2TZMachineState *mms, void *opaque,
}
static MemoryRegion *make_i2c(MPS2TZMachineState *mms, void *opaque,
- const char *name, hwaddr size)
+ const char *name, hwaddr size,
+ const int *irqs)
{
ArmSbconI2CState *i2c = opaque;
SysBusDevice *s;
@@ -604,7 +615,8 @@ static void mps2tz_common_init(MachineState *machine)
continue;
}
- mr = pinfo->devfn(mms, pinfo->opaque, pinfo->name, pinfo->size);
+ mr = pinfo->devfn(mms, pinfo->opaque, pinfo->name, pinfo->size,
+ pinfo->irqs);
portname = g_strdup_printf("port[%d]", port);
object_property_set_link(OBJECT(ppc), portname, OBJECT(mr),
&error_fatal);