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authorJoel Stanley <joel@jms.id.au>2021-05-01 10:03:51 +0200
committerCédric Le Goater <clg@kaod.org>2021-05-01 10:03:51 +0200
commitc5475b3f9aa28c1c1422c7de0bab40c5dff77341 (patch)
tree2a6ef39ffc5ad4f1f8ed5b506127b958eeabdc24 /docs
parente9c568dbc22551f069dbc30ca3b61e168f494d47 (diff)
downloadqemu-c5475b3f9aa28c1c1422c7de0bab40c5dff77341.zip
hw: Model ASPEED's Hash and Crypto Engine
The HACE (Hash and Crypto Engine) is a device that offloads MD5, SHA1, SHA2, RSA and other cryptographic algorithms. This initial model implements a subset of the device's functionality; currently only MD5/SHA hashing, and on the ast2600's scatter gather engine. Co-developed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> [ clg: - fixes for 32-bit and OSX builds ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20210409000253.1475587-2-joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'docs')
-rw-r--r--docs/system/arm/aspeed.rst1
1 files changed, 1 insertions, 0 deletions
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
index d1fb8f25b3..23a1468cd1 100644
--- a/docs/system/arm/aspeed.rst
+++ b/docs/system/arm/aspeed.rst
@@ -49,6 +49,7 @@ Supported devices
* Ethernet controllers
* Front LEDs (PCA9552 on I2C bus)
* LPC Peripheral Controller (a subset of subdevices are supported)
+ * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
Missing devices