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authorAleksandar Markovic <aleksandar.qemu.devel@gmail.com>2020-05-18 22:09:15 +0200
committerAleksandar Markovic <aleksandar.qemu.devel@gmail.com>2020-06-09 17:32:45 +0200
commit9579f7816855757c747f9428a8e53d0fe0a0e9b7 (patch)
tree8e8d33ad908f49522fdeef485635904781d44064 /bsd-user/elfload.c
parent485cd2e4ce35f24428bd1783ad31325acc67b350 (diff)
downloadqemu-9579f7816855757c747f9428a8e53d0fe0a0e9b7.zip
target/mips: fpu: Refactor conversion from ieee to mips exception flags
The original coversion function is used for regular and MSA floating point instructions handling. Since there are some nuanced differences between regular and MSA floating point exception handling, provide two instances of the conversion function, rather than just a single common one. Inline both instances of this function instances for the sake of performance. Improve variable naming in surrounding code for clarity. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200518200920.17344-17-aleksandar.qemu.devel@gmail.com>
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