diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2020-06-28 02:53:32 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2020-08-21 12:48:15 -0700 |
| commit | ee659da21af5707191ef35e8de549d028790e7f5 (patch) | |
| tree | 8f7f65cffb008fcda2bc19142c1ccc26c983dbc7 | |
| parent | fbcc38e4cb1b539b8615ec9b0adc285351d77628 (diff) | |
| download | qemu-ee659da21af5707191ef35e8de549d028790e7f5.zip | |
target/xtensa: add geometry to xtensa_get_regfile_by_name
Register file name may not uniquely identify a register file in the set
of configurations. E.g. floating point registers may have different size
in different configurations. Use register file geometry as additional
identifier.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| -rw-r--r-- | target/xtensa/cpu.h | 2 | ||||
| -rw-r--r-- | target/xtensa/helper.c | 4 | ||||
| -rw-r--r-- | target/xtensa/translate.c | 35 |
3 files changed, 31 insertions, 10 deletions
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 0c96181212..0409aa6189 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -598,7 +598,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, void xtensa_collect_sr_names(const XtensaConfig *config); void xtensa_translate_init(void); -void **xtensa_get_regfile_by_name(const char *name); +void **xtensa_get_regfile_by_name(const char *name, int entries, int bits); void xtensa_breakpoint_handler(CPUState *cs); void xtensa_register_core(XtensaConfigList *node); void xtensa_sim_open_console(Chardev *chr); diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index 7073381f03..05e2b7f70a 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -133,8 +133,10 @@ static void init_libisa(XtensaConfig *config) config->regfile = g_new(void **, regfiles); for (i = 0; i < regfiles; ++i) { const char *name = xtensa_regfile_name(config->isa, i); + int entries = xtensa_regfile_num_entries(config->isa, i); + int bits = xtensa_regfile_num_bits(config->isa, i); - config->regfile[i] = xtensa_get_regfile_by_name(name); + config->regfile[i] = xtensa_get_regfile_by_name(name, entries, bits); #ifdef DEBUG if (config->regfile[i] == NULL) { fprintf(stderr, "regfile '%s' not found for %s\n", diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 03d796d7a1..9838bf6b3e 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -227,24 +227,43 @@ void xtensa_translate_init(void) "exclusive_val"); } -void **xtensa_get_regfile_by_name(const char *name) +void **xtensa_get_regfile_by_name(const char *name, int entries, int bits) { + char *geometry_name; + void **res; + if (xtensa_regfile_table == NULL) { xtensa_regfile_table = g_hash_table_new(g_str_hash, g_str_equal); + /* + * AR is special. Xtensa translator uses it as a current register + * window, but configuration overlays represent it as a complete + * physical register file. + */ g_hash_table_insert(xtensa_regfile_table, - (void *)"AR", (void *)cpu_R); + (void *)"AR 16x32", (void *)cpu_R); g_hash_table_insert(xtensa_regfile_table, - (void *)"MR", (void *)cpu_MR); + (void *)"AR 32x32", (void *)cpu_R); g_hash_table_insert(xtensa_regfile_table, - (void *)"FR", (void *)cpu_FR); + (void *)"AR 64x32", (void *)cpu_R); + g_hash_table_insert(xtensa_regfile_table, - (void *)"BR", (void *)cpu_BR); + (void *)"MR 4x32", (void *)cpu_MR); + g_hash_table_insert(xtensa_regfile_table, - (void *)"BR4", (void *)cpu_BR4); + (void *)"FR 16x32", (void *)cpu_FR); + g_hash_table_insert(xtensa_regfile_table, - (void *)"BR8", (void *)cpu_BR8); + (void *)"BR 16x1", (void *)cpu_BR); + g_hash_table_insert(xtensa_regfile_table, + (void *)"BR4 4x4", (void *)cpu_BR4); + g_hash_table_insert(xtensa_regfile_table, + (void *)"BR8 2x8", (void *)cpu_BR8); } - return (void **)g_hash_table_lookup(xtensa_regfile_table, (void *)name); + + geometry_name = g_strdup_printf("%s %dx%d", name, entries, bits); + res = (void **)g_hash_table_lookup(xtensa_regfile_table, geometry_name); + g_free(geometry_name); + return res; } static inline bool option_enabled(DisasContext *dc, int opt) |