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authorPaolo Bonzini <pbonzini@redhat.com>2017-02-21 09:29:34 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2017-03-03 16:40:02 +0100
commitc3e31eaa21bc038c146cb196f7762a972eb9de5b (patch)
tree0d9c08e6bbcb8d4d651fcd537831bc9d3145d670
parentcf0f7cf903073f9dd9979dd33d52618b384ac2cb (diff)
downloadqemu-c3e31eaa21bc038c146cb196f7762a972eb9de5b.zip
vmxcap: port to Python 3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rwxr-xr-xscripts/kvm/vmxcap14
1 files changed, 7 insertions, 7 deletions
diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
index 222025525b..af8de1558b 100755
--- a/scripts/kvm/vmxcap
+++ b/scripts/kvm/vmxcap
@@ -27,9 +27,9 @@ MSR_IA32_VMX_VMFUNC = 0x491
class msr(object):
def __init__(self):
try:
- self.f = open('/dev/cpu/0/msr', 'r', 0)
+ self.f = open('/dev/cpu/0/msr', 'rb', 0)
except:
- self.f = open('/dev/msr0', 'r', 0)
+ self.f = open('/dev/msr0', 'rb', 0)
def read(self, index, default = None):
import struct
self.f.seek(index)
@@ -49,7 +49,7 @@ class Control(object):
val = m.read(nr, 0)
return (val & 0xffffffff, val >> 32)
def show(self):
- print self.name
+ print(self.name)
mbz, mb1 = self.read2(self.cap_msr)
tmbz, tmb1 = 0, 0
if self.true_cap_msr:
@@ -69,7 +69,7 @@ class Control(object):
s = 'forced'
elif one and zero:
s = 'yes'
- print ' %-40s %s' % (self.bits[bit], s)
+ print(' %-40s %s' % (self.bits[bit], s))
class Misc(object):
def __init__(self, name, bits, msr):
@@ -77,9 +77,9 @@ class Misc(object):
self.bits = bits
self.msr = msr
def show(self):
- print self.name
+ print(self.name)
value = msr().read(self.msr, 0)
- print ' Hex: 0x%x' % (value)
+ print(' Hex: 0x%x' % (value))
def first_bit(key):
if type(key) is tuple:
return key[0]
@@ -94,7 +94,7 @@ class Misc(object):
def fmt(x):
return { True: 'yes', False: 'no' }[x]
v = (value >> lo) & ((1 << (hi - lo + 1)) - 1)
- print ' %-40s %s' % (self.bits[bits], fmt(v))
+ print(' %-40s %s' % (self.bits[bits], fmt(v)))
controls = [
Misc(